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The IDT7009 is a high-speed 128K x 8 Dual-Port Static RAM. The IDT7009 is designed to be used as a stand-alone 1024K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-ormore word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider memory system applications results in fullspeed, error-free operation without the need for additional discrete logic.
This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (CE0 and CE1) permit the on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only1W of power.
The IDT7009 is packaged in a 100-pin Thin Quad Flatpack (TQFP).
IDT7009L Maximum Ratings
Symbol
Rating
Commercial & Industrial
Military
Unit
VTERM(2)
Terminal Voltage with Respect to GND
0.5 to +7.0
0.5 to +7.0
V
TBIAS
Temperature Under Bias
55 to +125
65 to +135
TSTG
Storage Temperature
60 to +150
65 to +150
IOUT
DC Output Current
50
50
mA
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM > Vcc + 10%.
IDT7009L Features
` True Dual-Ported memory cells which allow simultaneous reads of the same memory location ` High-speed access Commercial: 15/20ns (max.) ` Low-power operation IDT7009L Active: 1W (typ.) Standby: 1mW (typ.) ` Dual chip enables allow for depth expansion without external logic ` IDT7009 easily expands data bus width to 16 bits or more using the Mas ` M/S = VIH for BUSY output flag on Master,M/S = VIL for BUSY input on Slave ` Interrupt Flag ` On-chip port arbitration logic ` Full on-chip hardware support of semaphore signaling between ports ` Fully asynchronous operation from either port ` TTL-compatible, single 5V (±10%) power supply ` Available in a 100-pin TQFP ` Industrial temperature range (40°C to +85°C) is available for selected speeds