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IDT5T9890, IDT5T9891, IDT5T995

Table of contents:
Info of IDT5T9890
Info of IDT5T9891
Info of IDT5T995

IDT5T9890, IDT5T9891, IDT5T995 Selling Leads, Datasheet

MFG:IDT Package Cooled:N/A D/C:09+

IDT5T9890, IDT5T9891, IDT5T995 Datasheet download

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Part Number: IDT5T9890

MFG: IDT

Package Cooled: N/A

D/C: 09+

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IDT5T995 General Description

The IDT5T995 is a high fanout 2.5V PLL based clock driver intended for high performance computing and data-communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal.

The IDT5T995 has eight programmable skew outputs in four banks of 2. Skew is controlled by 3-level input signals that may be hard-wired to appropriate high-mid-low levels. The feedback input allows divide-by-functionality from 1 to 12 through the use of the DS[1:0] inputs. This provides the user with frequency multiplication from 1 to 12 without using divided outputs for feedback. When the sOE pin is held low, all the outputs are synchronously enabled. However, if sOE is held high, all the outputs except 2Q0 and 2Q1 are synchronously disabled.

The LOCK output asserts to indicate when Phase Lock has been achieved. Furthermore, when PE is held high, all the outputs are synchronized with the positive edge of the REF clock input. When PE is held low, all the outputs are synchronized with the negative edge of REF. The IDT5T995 has LVTTL outputs with 12mA balanced drive outputs.

IDT5T995 Maximum Ratings

Symbol	Description		Commercial & Industrial	Unit
VDDQ, VDD	Supply Voltage to Ground		0.5 to +4.6	V
VI	DC Input Voltage		0.5 to VDD+0.5	V
	REF Input Voltage		0.5 to +4.6	V
	Maximum Power Dissipation	TA = 85°C	0.7	W
	Maximum Power Dissipation	TA = 55°C	1.1	W
T_STG	Storage Temperature Range		65 to +150	° C

NOTE:
1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolutemaximum-
rated conditions for extended periods may affect device reliability.

IDT5T995 Features

• Ref input is 3.3V tolerant
• 4 pairs of programmable skew outputs
• Low skew: 185ps same pair, 250ps all outputs
• Selectable positive or negative edge synchronization:
Excellent for DSP applications
• Synchronous output enable
• Input frequency:
Std: 2MHz to 160MHz
A: 2MHz to 200MHz
• Output frequency:
Std: 6MHz to 160MHz
A: 6MHz to 200MHz
• 3-level inputs for skew and PLL range control
• 3-level inputs for feedback divide selection multiply / divide
ratios of (1-6, 8, 10, 12) / (2, 4)
• PLL bypass for DC testing
• External feedback, internal loop filter
• 12mA balanced drive outputs
• Low Jitter: <100ps cycle-to-cycle
• Power-down mode
• Lock indicator
• Standard and A speed grades

IDT5T995 Connection Diagram

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