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IDT5991A, IDT5991A-5JI, IDT5991A-7JI

Table of contents:
Info of IDT5991A
Info of IDT5991A-5JI
Info of IDT5991A-7JI

IDT5991A, IDT5991A-5JI, IDT5991A-7JI Selling Leads, Datasheet

MFG:N/A Package Cooled:N/A D/C:09+

IDT5991A, IDT5991A-5JI, IDT5991A-7JI Picture

IDT5991A, IDT5991A-5JI, IDT5991A-7JI Datasheet download

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Part Number: IDT5991A

MFG: N/A

Package Cooled: N/A

D/C: 09+

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IDT5991A General Description

The IDT5991A is a high fanout PLL based clock driver intended for high performance computing and data-communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The IDT5991A has eight programmable skew outputs in four banks of 2. Skew is controlled by 3-level input signals that may be hard-wired to appropriate HIGH-MID-LOW levels.

The IDT5991A maintains Cypress CY7B991 compatibility while providing two additional features: Synchronous Output Enable (GND/sOE), and Positive/Negative Edge Synchronization (VCCQ/PE). When the GND/ sOE pin is held low, all the outputs are synchronously enabled (CY7B991 compatibility). However, if GND/sOE is held high, all the outputs except 3Q0 and 3Q1 are synchronously disabled.

Furthermore, when the VCCQ/PE is held high, all the outputs are synchronized with the positive edge of the REF clock input (CY7B991 compatibility). When VCCQ/PE is held low, all the outputs are synchronized with the negative edge of REF.

IDT5991A Maximum Ratings

Symbol	Description	Max	Unit
VI TJ TSTG	Supply Voltage to Ground DC Input Voltage Junction Temperature Storage Temperature	0.5 to +7 0.5 to +7 150 65 to +150	V V °C °C

NOTE:
1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolutemaximum- rated conditions for extended periods may affect device reliability.

IDT5991A Features

• 4 pairs of programmable skew outputs
• Low skew: 200ps same pair, 250ps all outputs
• Selectable positive or negative edge synchronization:
Excellent for DSP applications
• Synchronous output enable
• Output frequency: 3.75MHz to 100MHz
• 2x, 4x, 1/2, and 1/4 outputs
• 5V with TTL outputs
• 3 skew grades:
IDT5991A-2: tSKEW0<250ps
IDT5991A-5: tSKEW0<500ps
IDT5991A-7: tSKEW0<750ps
• 3-level inputs for skew and PLL range control
• PLL bypass for DC testing
• External feedback, internal loop filter
• 46mA IOL high drive outputs
• Low Jitter: <200ps peak-to-peak
• Outputs drive 50Ω terminated lines
• Pin-compatible with Cypress CY7B991
• Available in PLCC Package

IDT5991A Connection Diagram

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