ICX4068BQF, ICX406AQ-C, ICX406AQF Selling Leads, Datasheet
MFG:SONY Package Cooled:CDIP-10 D/C:05+

ICX4068BQF, ICX406AQ-C, ICX406AQF Datasheet download
Part Number: ICX4068BQF
MFG: SONY
Package Cooled: CDIP-10
D/C: 05+
MFG:SONY Package Cooled:CDIP-10 D/C:05+
ICX4068BQF, ICX406AQ-C, ICX406AQF Datasheet download
MFG: SONY
Package Cooled: CDIP-10
D/C: 05+
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PDF/DataSheet Download
Datasheet: ICX026CKA
File Size: 332459 KB
Manufacturer: SONY [Sony Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: ICX026CKA
File Size: 332459 KB
Manufacturer: SONY [Sony Corporation]
Download : Click here to Download
PDF/DataSheet Download
Datasheet: ICX406AQF
File Size: 358219 KB
Manufacturer: SONY [Sony Corporation]
Download : Click here to Download
The ICX406AQF is a diagonal 8.98mm (Type 1/1.8) interline CCD solid-state image sensor with a square pixel array and 3.98M effective pixels. Frame readout allows all pixels' signals to be output independently within approximately 1/3.33 second.
Also, number of vertical pixels decimation allows output of 30 frames per second in high frame rate readout mode.
This chip features an electronic shutter with variable charge-storage time.
R, G, B primary color mosaic filters are used as the color filters, and at the same time high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology.
This chip is suitable for applications such as electronic still cameras, etc.
Item |
Ratings | Unit | Remarks | |
Against φSUB | VDD, VOUT, φRG – φSUB | –40 to +12 | V | |
Vφ1A, Vφ1B, Vφ3A, Vφ3B – φSUB | –50 to +15 | V | ||
Vφ2, Vφ4, VL – φSUB | –50 to +0.3 | V | ||
Hφ1, Hφ2, GND – φSUB | –40 to +0.3 | V | ||
CSUB – φSUB | –25 to | V | ||
Against φGND | VDD, VOUT, φRG, CSUB – GND | –0.3 to +22 | V | |
Vφ1A, Vφ1B, Vφ2, Vφ3A, Vφ3B, Vφ4 – GND | –10 to +18 | V | ||
Hφ1, Hφ2 – GND | –10 to +6.5 | V | ||
Against VL | Vφ1A, Vφ1B, Vφ3A, Vφ3B – VL | –0.3 to +28 | V | |
Vφ2, Vφ4, Hφ1, Hφ2, GND – VL | –0.3 to +15 | V | ||
Between input clock pins |
Voltage difference between vertical clock input pins | to +15 | V | *1 |
Hφ1 – Hφ2 | –6.5 to +6.5 | V | ||
Hφ1, Hφ2 – Vφ4 | –10 to +16 | V | ||
Storage temperature | –30 to +80 | °C | ||
Guaranteed temperature of performance | –10 to +60 | °C | ||
Operating temperature | –10 to +75 | °C |
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