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HY27UA08121M-TCB, HY27UA081G1M, HY27UA081G1M TCB

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Info of HY27UA08121M-TCB
Info of HY27UA081G1M
Info of HY27UA081G1M TCB

HY27UA08121M-TCB, HY27UA081G1M, HY27UA081G1M TCB Selling Leads, Datasheet

MFG:HY Package Cooled:TSSOP48 D/C:New

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HY27UA08121M-TCB, HY27UA081G1M, HY27UA081G1M TCB Datasheet download

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Part Number: HY27UA08121M-TCB

MFG: HY

Package Cooled: TSSOP48

D/C: New

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HY27UA081G1M General Description

The HYNIX HY27(U/S)A(08/16)1G1M series is a family of non-volatile Flash memories that use NAND cell technology. The devices operate 3.3V and 1.8V voltage supply. The size of a Page is either 528 Bytes (512 + 16 spare) or 264 Words (256 + 8 spare) depending on whether the device has a x8 or x16 bus width.

The address lines are multiplexed with the Data Input/ Output signals on a multiplexed x8 or x16 Input/ Output bus.

This interface reduces the pin count and makes it possible to migrate to other densities without changing the footprint. Each block can be programmed and erased over 100,000 cycles. To extend the lifetime of NAND Flash devices it is strongly recommended to implement an Error Correction Code (ECC). A Write Protect pin is available to give a hardware protection against program and erase operations.

The devices feature an open-drain Ready/Busy output that can be used to identify if the Program/ Erase/Read (PER) Controller is currently active. The use of an open-drain output allows the Ready/ Busy pins from several memories to be connected to a single pull-up resistor.

A Copy Back command is available to optimize the management of defective blocks. When a Page Program operation fails, the data can be programmed in another page without having to resend the data to be programmed.

The devices are available in the following packages:
- 48-TSOP1 (12 x 20 x 1.2 mm)
- 48-WSOP1 (12 x 17 x 0.7 mm)
- 63-FBGA (8.5 x 15 x 1.2 mm, 6 x 8 ball array, 0.8mm pitch)

Three options are available for the NAND Flash family:
- Automatic Page 0 Read after Power-up, which allows the microcontroller to directly download the boot code from page 0.
- Chip Enable Dont Care, which allows code to be directly downloaded by a microcontroller, as Chip Enable transitions during the latency time do not stop the read operation.
- A Serial Number, which allows each device to be uniquely identified. The Serial Number options is subject to an NDA (Non Disclosure Agreement) and so not described in the datasheet. For more details of this option contact your nearest HYNIX Sales office.

Devices are shipped from the factory with Block 0 always valid and the memory content bits, in valid blocks, erased to '1'.

HY27UA081G1M Maximum Ratings

Symbol	Parameter		NAND Flash		Unit
Symbol	Parameter		Min	Max	Unit
T_BTAS	Temperature Under Bias		-50	125
T_STG	Storage Temperature		-65	150
V_IO⁽¹⁾	Input or Output Voltage	1.8V devices	-0.6	2.7	V
V_IO⁽¹⁾	Input or Output Voltage	3.3 V devices	-0.6	4.6	V
V_CC	Supply Voltage	1.8V devices	-0.6	2.7	V
V_CC	Supply Voltage	3.3 V devices	-0.6	4.6	V

Note: (1). Minimum Voltage may undershoot to -2V for less than 20ns during transitions on input and I/O pins. Maximum voltage may overshoot to VCC + 2V for less than 20ns during transitions on I/O pins.

HY27UA081G1M Features

HIGH DENSITY NAND FLASH MEMORIES
- Cost effective solutions for mass storage applications
NAND INTERFACE
- x8 or x16 bus width.
- Multiplexed Address/ Data
- Pinout compatibility for all densities
SUPPLY VOLTAGE
- 3.3V device: VCC = 2.7 to 3.6V : HY27UAXX1G1M
- 1.8V device: VCC = 1.7 to 1.95V : HY27SAXX1G1M
1.8V Operation Product : TBD
Memory Cell Array
- 1056Mbit = 528 Bytes x 32 Pages x 8,192 Blocks
PAGE SIZE
- x8 device: (512 + 16 spare) Bytes : HY27(U/S)A081G1M
- x16 device: (256 + 8 spare) Words : HY27(U/S)A161G1M
BLOCK SIZE
- x8 device: (16K + 512 spare) Bytes : HY27(U/S)A081G1M
- x16 device: (8K + 256 spare) Words : HY27(U/S)A161G1M
PAGE READ / PROGRAM
- Random access: 12us (max)
- Sequential access: 50ns (min)
- Page program time: 200us (typ)
COPY BACK PROGRAM MODE
- Fast page copy without external buffering
FAST BLOCK ERASE
- Block erase time: 2ms (Typ)
STATUS REGISTER
ELECTRONIC SIGNATURE
Sequential Row Read Option
AUTOMATIC PAGE 0 READ AT POWER-UP OPTION
- Boot from NAND support
- Automatic Memory Download
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
- Program/Erase locked during Power transitions
DATA INTEGRITY
- 100,000 Program/Erase cycles
- 10 years Data Retention
PACKAGE
- HY27(U/S)A(08/16)1G1M-T(P) : 48-Pin TSOP1 (12 x 20 x 1.2 mm)
- HY27(U/S)A(08/16)1G1M-T (Lead)
- HY27(U/S)A(08/16)1G1M-TP (Lead Free)
- HY27(U/S)A08121A-V(P) : 48-Pin WSOP1 (12 x 17 x 0.7 mm)
- HY27(U/S)A081G1M-V (Lead)
- HY27(U/S)A081G1M-VP (Lead Free)
- HY27(U/S)A(08/16)121M-F(P) : 63-Ball FBGA (8.5 x 15 x 1.2 mm)
- HY27(U/S)A(08/16)1G1M-F (Lead)
- HY27(U/S)A(08/16)1G1M-FP (Lead Free)

HY27UA081G1M Connection Diagram

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