Features: · HIGH DENSITY NAND FLASH MEMORIES- Cost effective solutions for mass storage applications· NAND INTERFACE- x8 or x16 bus width.- Multiplexed Address/ Data- Pinout compatibility for all densities· SUPPLY VOLTAGE- 3.3V device: VCC = 2.7 to 3.6V : HY27USXX561M- 1.8V device: VCC = 1.7 to 1....
HY27US08561M: Features: · HIGH DENSITY NAND FLASH MEMORIES- Cost effective solutions for mass storage applications· NAND INTERFACE- x8 or x16 bus width.- Multiplexed Address/ Data- Pinout compatibility for all de...
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Features: HIGH DENSITY NAND FLASH MEMORIES- Cost effective solutions for mass storage applications...
Features: HIGH DENSITY NAND FLASH MEMORIES- Cost effective solutions for mass storage applications...
Features: HIGH DENSITY NAND FLASH MEMORIES- Cost effective solutions for mass storage applications...
Symbol | Parameter | NAND Flash Min Max |
Unit | ||
TBIAS | Temperature Under Bias | -50 | 125 | oC | |
TSTG | Storage Temperature | -65 | 150 | oC | |
VIO(1) | Input or Output Voltage | 1.8V devices 3.3 V devices |
-0.6 | 2.7 4.6 |
V |
VCC | Supply Voltage | 1.8V devices 3.3 V devices |
-0.6 | 2.7 4.6 |
V |
The HY27US08561M series is a family of non-volatile Flash memories that uses NAND cell technology. The devices operate 3.3V and 1.8V voltage supply. The size of a Page is either 528 Bytes (512 + 16 spare) or 264 Words (256 + 8 spare) depending on whether the device has a x8 or x16 bus width.
The address lines are multiplexed with the Data Input/ Output signals on a multiplexed x8 or x16 Input/ Output bus. This HY27US08561M interface reduces the pin count and makes it possible to migrate to other densities without changing the footprint.
Each block can be programmed and erased over 100,000 cycles. To extend the lifetime of NAND Flash devices HY27US08561M it is strongly recommended to implement an Error Correction Code (ECC). A Write Protect pin is available to give a hardware protection against program and erase operations.
The devices HY27US08561M feature an open-drain Ready/Busy output that can be used to identify if the Program/ Erase/Read (PER) Controller is currently active. The use of an open-drain output allows the Ready/ Busy pins from several memories to be connected to a single pull-up resistor.
A Copy Back command is available from HY27US08561M to optimize the management of defective blocks. When a Page Program operation
fails, the data can be programmed in another page without having to resend the data to be programmed.