GAL20XV10, GAL20XV10-20LP, GAL20XV10B 15LP Selling Leads, Datasheet
MFG:LAT Package Cooled:DIP D/C:08+
GAL20XV10, GAL20XV10-20LP, GAL20XV10B 15LP Datasheet download
Part Number: GAL20XV10
MFG: LAT
Package Cooled: DIP
D/C: 08+
GAL20XV10, GAL20XV10-20LP, GAL20XV10B 15LP
- Table of contents:
Info of GAL20XV10
Info of GAL20XV10-20LP
Info of GAL20XV10B 15LP
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About GAL20XV10
PDF/DataSheet Download
Datasheet: GAL20XV10
File Size: 239708 KB
Manufacturer: LATTICE [Lattice Semiconductor]
Download : Click here to Download
About GAL16LV8
PDF/DataSheet Download
Datasheet: GAL16LV8
File Size: 346203 KB
Manufacturer: LATTICE [Lattice Semiconductor]
Download : Click here to Download
About GAL16LV8
PDF/DataSheet Download
Datasheet: GAL16LV8
File Size: 346203 KB
Manufacturer: LATTICE [Lattice Semiconductor]
Download : Click here to Download
GAL20XV10 General Description
The GAL20XV10 combines a high performance CMOS process with electrically erasable (E2) floating gate technology to provide the highest speed Exclusive-OR PLD available in the market. At 90mA maximum Icc (75mA typical Icc), the GAL20XV10 provides a substantial savings in power when compared to bipolar counterparts. E2CMOS technology offers high speed (<100ms) erase times providing the ability to reprogram, reconfigure or test the devices quickly and efficiently.
The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. An important subset of the many architecture configurations possible with the GAL20XV10 are the PAL® architectures listed in the macrocell description section of this document. The GAL20XV10 is capable of emulating these PAL architectures with full function and parametric compatibility.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacturing. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.
GAL20XV10 Maximum Ratings
Supply voltage Vcc ......................................... 0.5 to+7V
Input voltage applied .......................... 2.5 to VCC +1.0V
Off-state output voltage applied ......... 2.5 to VCC +1.0V
Storage Temperature ................................... 65 to 150
Ambient Temperature with
Power Applied .............................................. 55 to 125
1.Stresses above those listed under the "Absolute Maximum Ratings" may cause permanent damage to
the device. These are stress only ratings and functional operation of the device at these or at any other
conditions above those indicated in the operational sections of this specification is not implied (while
programming, follow the programming specifications).
Input voltage applied .......................... 2.5 to VCC +1.0V
Off-state output voltage applied ......... 2.5 to VCC +1.0V
Storage Temperature ................................... 65 to 150
Ambient Temperature with
Power Applied .............................................. 55 to 125
1.Stresses above those listed under the "Absolute Maximum Ratings" may cause permanent damage to
the device. These are stress only ratings and functional operation of the device at these or at any other
conditions above those indicated in the operational sections of this specification is not implied (while
programming, follow the programming specifications).
GAL20XV10 Features
• HIGH PERFORMANCE E2CMOS ® TECHNOLOGY
- 10 ns Maximum Propagation Delay
- Fmax = 100 MHz
- 7 ns Maximum from Clock Input to Data Output
- TTL Compatible 16 mA Outputs
- UltraMOS® Advanced CMOS Technology
• 50% to 75% REDUCTION IN POWER FROM BIPOLAR
- 90mA Maximum Icc
- 75mA Typical Icc
• ACTIVE PULL-UPS ON ALL PINS
• E2 CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100 ms)
- 20 Year Data Retention
• TEN OUTPUT LOGIC MACROCELLS
- XOR Gate Capability on all Outputs
- Full Function and Parametric Compatibility with PAL12L10, 20L10, 20X10, 20X8, 20X4
- Registered or Combinatorial with Polarity
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
• APPLICATIONS INCLUDE:
- High Speed Counters
- Graphics Processing
- Comparators
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
- 10 ns Maximum Propagation Delay
- Fmax = 100 MHz
- 7 ns Maximum from Clock Input to Data Output
- TTL Compatible 16 mA Outputs
- UltraMOS® Advanced CMOS Technology
• 50% to 75% REDUCTION IN POWER FROM BIPOLAR
- 90mA Maximum Icc
- 75mA Typical Icc
• ACTIVE PULL-UPS ON ALL PINS
• E2 CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100 ms)
- 20 Year Data Retention
• TEN OUTPUT LOGIC MACROCELLS
- XOR Gate Capability on all Outputs
- Full Function and Parametric Compatibility with PAL12L10, 20L10, 20X10, 20X8, 20X4
- Registered or Combinatorial with Polarity
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
• APPLICATIONS INCLUDE:
- High Speed Counters
- Graphics Processing
- Comparators
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
GAL20XV10 Connection Diagram
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