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G2955, G2992, G2992F1U

Table of contents:
Info of G2955
Info of G2992
Info of G2992F1U

G2955, G2992, G2992F1U Selling Leads, Datasheet

MFG:ST Package Cooled:SO-8 D/C:ST

G2955, G2992, G2992F1U Datasheet download

Five Points

Part Number: G2955

MFG: ST

Package Cooled: SO-8

D/C: ST

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G2992 General Description

The G2992 is a linear regulator designed to meet the JEDEC SSTL-18, SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR I / II -SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients. This device can deliver 3A continuous current in the application such as required for DDR I/ II SDRAM termination. The G2992 can easily provide the accurate V_TT voltage with two external resistors generating reference voltage. The quiescent current is as low as 750A @ V_CNTL = 3.3V. So the power consumption can meet the low power consumption applications. The G2992 also has a shutdown function by setting V_REFsmaller than 0.2V, that provides Suspend to RAM (STR) functionality. When in the shutdown mode, the V_TToutput (on V_OUTpin) will be tri-state providing a high impendence. A power saving advantage can be obtained in this mode through lowering the quiescent current to 50A @ V_CNTL = 3.3V.

G2992 Features

V_CNTLSupply Voltage: 3.3V to 5.5V
Termination Supply Voltage: 1.8V to 3.6V
Support Both DDR I(1.25V_TT) and DDR II (0.9
V_TT) Requirements
Requires Only 20F Ceramic Output Capacitor
Low Output Offset
3A Source and Sink Current
Low External Component Count
No Inductor Required
Thermal Shutdown Protection
Over Current Protection
Suspend to RAM (STR) Function with
High-impedance output
SOP-8 (FD) Package

G2992 Typical Application

DDR-SDRAM Termination Voltage
DDR I / DDR II Termination Voltage
SSTL-18
SSTL-2
SSTL-3

G2992 Connection Diagram

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