G2996

The G2996 is a linear regulator designed to meet the JEDEC SSTL-18 ,SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients. This device can deliver 1.5A/0.9A continuous current and transient peaks up to 3A/1.8A in the application as required for DDRI/II-SDRAM termination. With an independent V_SENSE pin, the G2996 can provide superior load regulation. The G2996 provides a VREF output as the reference for the applications of the chipset and DIMMs.

The G2996 can easily provide the accurate V_TT and VREF voltages without external resistors that PCB areas can be reduced. The quiescent current is as low as 280A @ 2.5V. So the power consumption can meet the low power consumption applications.

The G2996 also has an active low shutdown (SD ) pin that provides Suspend to RAM (STR) functionality. When SD is pulled low, the V_TT output will be tri-state providing a high impendence, but VREF will remain active. A power saving advantage can be obtained in this mode through lowering the quiescent current to180A @ 2.5V.