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FQD3N60TM, FQD3P20, FQD3P50

Table of contents:
Info of FQD3N60TM
Info of FQD3P20
Info of FQD3P50

FQD3N60TM, FQD3P20, FQD3P50 Selling Leads, Datasheet

MFG:Fairchild Semiconductor Category:Discrete Semiconductor Products Package Cooled:TO-252(DPAK) D/C:06+

FQD3N60TM, FQD3P20, FQD3P50 Datasheet download

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Part Number: FQD3N60TM

Category: Discrete Semiconductor Products

MFG: Fairchild Semiconductor

Package Cooled: TO-252(DPAK)

D/C: 06+

Description: MOSFET N-CH 600V 2.4A DPAK

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FQD3N60TM Parameters

Technical/Catalog Information	FQD3N60TM
Vendor	Fairchild Semiconductor
Category	Discrete Semiconductor Products
Mounting Type	Surface Mount
FET Polarity	N-Channel
Drain to Source Voltage (Vdss)	600V
Current - Continuous Drain (Id) @ 25° C	2.4A
Rds On (Max) @ Id, Vgs	3.6 Ohm @ 1.2A, 10V
Input Capacitance (Ciss) @ Vds	450pF @ 25V
Power - Max	2.5W
Packaging	Tape & Reel (TR)
Gate Charge (Qg) @ Vgs	13nC @ 10V
Package / Case	DPak, SC-63, TO-252 (2 leads+tab)
FET Feature	Standard
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	FQD3N60TM FQD3N60TM

FQD3P20 General Description

These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology.

This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters.

FQD3P20 Maximum Ratings

Symbol	Parameter	FQD3P20 / FQU3P20	Units
V_DSS	Drain-Source Voltage	-200	V
I_D	Drain Current - Continuous (T_C = 25) - Continuous (T_C = 100)	-2.4	A
I_D		-1.52	A
I_DM	Drain Current - Pulsed (Note 1)	-9.6	A
V_GSS	Gate-Source Voltage	±30	V
E_AS	Single Pulsed Avalanche Energy (Note 2)	150	mJ
I_AR	Avalanche Current (Note 1)	-2.4	A
E_AR	Repetitive Avalanche Energy (Note 1)	3.7	mJ
dv/dt	Peak Diode Recovery dv/dt (Note 3)	-5.5	V/ns
P_D	Power Dissipation (T_A = 25) *	2.5	W
	Power Dissipation (T_C = 25) - Derate above 25	37	W
	Power Dissipation (T_C = 25) - Derate above 25	0.29	W/
T_J, T_STG	Operating and Storage Temperature Range	-55 to +150
T_L	Maximum lead temperature for soldering purposes, 1/8from case for 5 seconds	300

FQD3P20 Features

• -2.4A, -200V, R_DS(on) = 2.7Ω @V_GS = -10 V
• Low gate charge ( typical 6.0 nC)
• Low Crss ( typical 7.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability

FQD3P50 General Description

These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge.

FQD3P50 Maximum Ratings

Symbol		Parameter		FQD3P50 / FQU3P50	Units
V_DSS		Drain-Source Voltage		-500	V
I_D		Drain Current	- Continuous (TC = 100°C)	-2.1	A
			- Continuous (TC = 25°C)	-1.33	A
I_DM		Drain Current Pulsed (Note 1)		-8.4	A
V_GSS		Gate-Source Voltage		± 30	V
E_AS		Single Pulsed Avalanche Energy (Note 2)		250	mJ
I_AR		Avalanche Current (Note 1)		-2.1	A
E_AR		Repetitive Avalanche Energy (Note 1)		5.0	mJ
d _v/dt		Peak Diode Recovery dv/dt (Note 3)		-4.5	V/ns
P_D T_{J, TSTG}	Power Dissipation (TA = 25°C)			2.5	W
	Power Dissipation (TC = 25°C) - Derate above 25°C			30	W/°C
				0.24
	Operating and Storage Temperature Range			-55 to +150	°C
T_L		Maximum lead temperature for soldering purposes,1/8" from case for 5 seconds		300	°C

FQD3P50 Features

• -2.1A, -500V, RDS(on) = 4.9 @VGS = -10 V
• Low gate charge ( typical 18 nC)
• Low Crss ( typical 9.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability

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