6398, 6398B-P2, 6399

Maximum Supply Voltage
                                                                                    45V
ON/OFF Pin Input Voltage
                                                                                    -0.3 < V < +25V
Feedback Pin Voltage
                                                                                    -0.3 < V < +25V
Output Voltage to Ground
 (steady state)                                                            -1V
Power Dissipation
(Note 2, 3)
                                                                                    Internally Limited
Storage Temperature Range
                                                                                    -65 C to +150 C
ESD Susceptibility
(Note 4)
                                                                                    2kV
Lead Temperature
 Soldering, (10 seconds)                                              +260 C
Maximum Junction Temperature
                                                                                    +150 C
Thermal Resistance
ThetaJA
   16-Pin CERAMIC DIP  (Still Air @ 0.5W)                     75 C/W
                       (500LF/Min Air flow @ 0.5W)                 35 C/W
ThetaJC
    16-Pin CERAMIC DIP                                                 2 C/W 
(Note 3)
Package Weight
(Typical)
1920mg 16 - Pin Ceramic Dip
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. 

Note 3: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using junction-to-ambient, rather than junction-to-case, thermal resistance. It must not be assumed that the device leads will provide substantial heat transfer out of the package, since the thermal resistance of the leadframe material is very poor, relative to the material of the package base. The stated junction-to-case thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance, and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device. 

Note 4: Human body model, 1.5K Ohms in series with 100pF.

Maximum Supply Voltage
                                                                                 45V
ON/OFF Pin Input Voltage
                                                                                -0.3 < V < +25V
Feedback Pin Voltage
                                                                                -0.3 < V < +25V
Output Voltage to Ground
 (steady state)                                                         -1V
Power Dissipation
(Note 2, 3)
                                                                                 Internally Limited
Storage Temperature Range
                                                                                 -65 C to +150 C
ESD Susceptibility
(Note 4)
                                                                                 2kV
Lead Temperature
 Soldering, (10 seconds)                                           +260 C
Maximum Junction Temperature
                                                                                  +150 C
Thermal Resistance
ThetaJA
   16-Pin CERAMIC DIP   (Still Air @ 0.5W)                  75 C/W
                        (500LF/Min Air flow @ 0.5W)              35 C/W
ThetaJC
   16-Pin CERAMIC DIP                                                2 C/W
(Note 3)
Package Weight
(Typical)
1920mg 16 - Pin Ceramic Dip
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdma = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. 

Note 3: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using junction-to-ambient, rather than junction-to-case, thermal resistance. It must not be assumed that the device leads will provide substantial heat transfer out of the package, since the thermal resistance of the leadframe material is very poor, relative to the material of the package base. The stated junction-to-case thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance, and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device. 

Note 4: Human body model, 1.5K Ohms in series with 100pF.