Features: Number of instructions: 74
Minimum instruction execution time: 50 ns (@ internal 20 MHz operation)
General-purpose registers: 32 bits ´ 32 registers
Instruction set: Signed multiplication, saturation operations, 32-bit shift
instructions, bit manipulation instructions, load/store instructions
Memory space: 16 MB linear address space
Internal memory ROM: 128 KB (mPD703031A, 703031AY: mask ROM)
256 KB (mPD703033A, 703033AY: mask ROM) 256 KB (mPD70F3033A,
70F3033AY: flash memory) RAM: 12 KB (mPD703031A, 703031AY)
16 KB (mPD703033A, 703033AY, 70F3033A, 70F3033AY)
Interrupt/exception: mPD703031A, 703033A, 70F3033A
(external: 8, internal: 30 sources, exception: 1 source)
mPD703031AY, 703033AY, 70F3033AY (external: 8, internal: 31 sources, exception: 1 source)
I/O lines Total: 83
Timer/counters: 16-bit timer (2 channels: TM0, TM1) 8-bit timer (6 channels: TM2 to TM7)
Watch timer: 1 channel
Watchdog timer: 1 channel
Specifications(Specifications)
| Parameter |
Symbol |
Conditions |
Ratings |
Unit |
| Supplyvoltage |
VDD |
VDD pin |
0.5to+7.0 |
V |
| AVDD |
AVDD pin |
0.5to+7.0 |
V |
| BVDD |
BVDD pin |
0.5to+7.0 |
V |
| EVDD |
EVDD pin |
0.5to+7.0 |
V |
| AVSS |
AVSS pin |
0.5to+0.5 |
V |
| BVSS |
BVSS pin |
0.5to+0.5 |
V |
| EVSS |
EVSS pin |
0.5 to +0.5 |
V |
| Input voltage |
VI1 |
Note 1 (BVDD pin) |
0.5toBVDD+0.5Note4 |
V |
| VI2 |
Note 2 (EVDD pin) |
0.5toEVDD+0.5Note4 |
V |
| VI3 |
VPP pin (mPD70F3033A, 70F3033AY only) |
0.5 to +8.5 |
V |
| Analog input voltage |
VIAN |
Note 3 (AVDD pin) |
0.5toAVDD+0.5Note4 |
V |
| Analog reference input voltage |
AVREF |
AVREF pin |
0.5toAVDD+0.5Note4 |
V |
| Output current, low |
IOL |
Per pin |
4.0 |
mA |
Total for P00 to P07, P10 to P15, P20 to
P25 |
25 |
mA |
Total for P26, P27, P30 to P37, P100 to
P107, P110 to P113 |
25 |
mA |
| Total for P40 to P47, P90 to P96, CLKOUT |
25 |
mA |
| |
Total for P50 to P57, P60 to P65 |
25 |
mA |
| Output current, high |
IOH |
Per pin |
4.0 |
mA |
| |
Total for P00 to P07, P10 to P15, P20 to
P25 |
25 |
mA |
| |
TotalforP26,P27,P30toP37,P100toP107,
P110toP113 |
25 |
mA |
| |
TotalforP40toP47,P90toP96,CLKOUT |
25 |
mA |
| |
Total forP50toP57,P60toP65 |
25 |
mA |
| Output voltage |
VO1 |
Note 1 (BVDD pin) |
0.5toBVDD+0.5Note4 |
V |
| VO2 |
Note 2 (EVDD pin) |
0.5toEVDD+0.5Note4 |
V |
| Operatingambienttemperature |
TA |
Normal operation mode |
40 to +85 |
°C |
|
Flashmemoryprogrammingmode
(mPD70F3033A, 70F3033AY only) |
10 to 85 |
°C |
| Storagetemperature |
Tstg |
mPD703031A,703031AY |
65 to+150 |
°C |
| mPD703033A,703033AY |
| mPD70F3033A,70F3033AY |
40 to+125 |
°C |
DescriptionThe mPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, and 70F3033AY (V850/SB1) are 32-/16-bit single-chip microcontrollers of the V850 FamilyTM for AV equipment. 32-bit CPU, ROM, RAM, timer/counters, serial interfaces, A/D converter, DMA controller, and so on are integrated on a single chip.
The mPD70F3033A and 70F3033AY have flash memory in place of the internal mask ROM of the mPD703033A and 703033AY. Because flash memory allows the program to be written and erased electrically with the device mounted on the board, mPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, and 70F3033AY are ideal for the evaluation stages of system development, small-scale production, and rapid development of new products.
Detailed function descriptions of mPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, and 70F3033AY are provided in the following user's manuals. Be sure to read them before designing. V850/SB1, V850/SB2TM User's Manual Hardware: U13850E V850 Family User's Manual Architecture: U10243E
mPD703031A Data Sheet
