ZL30410

• Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS
• Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 (DS2), E1 and DS1 interfaces
• Compatible with GR-253-CORE SONET stratum 3 and G.813 SEC timing compliant clocks
• Provides "hit-less" reference switching
• Detects frequency of both reference clocks and synchronizes to any combination of 8 kHz, 1.544 MHz, 2.048 MHz and 19.44 MHz reference frequencies
• Continuously monitors both references for frequency accuracy exceeding ±12 ppm
• Holdover accuracy of 70x10 ^-12 meets GR-1244 Stratum 3E and ITU-T G.812 requirements
• Meets requirements of G.813 Option 1 for SDH Equipment Clocks (SEC) and GR-1244 for Stratum 4E and Stratum 4 Clocks
• 3.3 V power supply

The ZL30410 is a Multi-service Line Card Phase-Locked Loop designed to generate multiple clocks for SONET, SDH and PDH equipment including timing for ST-BUS and GCI interfaces.

The ZL30410 operates in NORMAL (LOCKED), HOLDOVER and FREE-RUN modes to ensure that in the presence of jitter and interruptions to the reference signals, the generated clocks meet international standards. The filtering characteristics of the PLL are hardware pin selectable and they do not require any external adjustable components. The ZL30410 uses an external 20 MHz Master Clock Oscillator to provide a stable timing source for the HOLDOVER operation.