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A43L0616B

Features: JEDEC standard 3.3V power supplyLVTTL compatible with multiplexed addressDual banks / Pulse RASMRS cycle with address key programs- CAS Latency (2,3)- Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave)All inputs are sampled at the positive going edge of the...

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SeekIC No. : 004260324 Detail

A43L0616B: Features: JEDEC standard 3.3V power supplyLVTTL compatible with multiplexed addressDual banks / Pulse RASMRS cycle with address key programs- CAS Latency (2,3)- Burst Length (1,2,4,8 & full page...

A43L0616B Data Sheet

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Part Number:
A43L0616B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Dual banks / Pulse RAS
MRS cycle with address key programs
- CAS Latency (2,3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system clock
Industrial operating temperature range: -40ºC to +85ºC for U
Pb-Free type for -F
Burst Read Single-bit Write operation
DQM for masking
Auto & self refresh
32ms refresh period (2K cycle)
50 Pin TSOP (II)





Pinout

Connection Diagram Connection Diagram




Specifications

Voltage on any pin relative to VSS (Vin, Vout ) . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +4.6V
Voltage on VDD supply relative to VSS (VDD, VDDQ )
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +4.6V
Storage Temperature (TSTG) . . . . . . . . -55°C to +150°C
Soldering Temperature X Time (TSLODER) . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .260°C X 10sec
Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . . . . . .1W
Short Circuit Current (Ios) . . . . . . . . . . . . . . . . . . . . 50mA





Description

The A43L0616B is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 X 524,288 words by 16 bits, fabricated with AMIC's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications.






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