ZL30226

The ZL30226/227/228 device is targeted to systems implementing the ATM FORUM Inverse Multiplexing for ATM (IMA version 1.1 and 1.0) or UNI specifications. In the ZL30226/227/228 architecture, up to 16 physical and independent serial links can be terminated through the utilization of off-the-shelf xDSL chip sets. The ZL30226/227/228 can provide up to 10 Mb/s per link data rates for TDM serial transmissions for xDSL applications.

The ZL30226/227/228 device provides ATM system designers with a flexible architecture when implementing ATM access over existing line interfaces, allowing a migration towards ATM service technology. The ZL30226/227/228 device is compliant with the ATM FORUM IMA specifications for controlling IMA groups of up to 16 lines in a single chip. The ZL30226/227/228 can be configured to operate in different modes to facilitate the implementation of the IMA function at both CPE and Central Office sites. For systems targeting ATM over DSL with IMA and TC operating simultaneously, the ZL30226/227/228 device provides the ideal architecture and capabilities.

The device provides up to 8 internal IMA processors and allows for bandwidth scaleability through the use of the UTOPIA MPHY, Level 1 and Level 2 specification at rates up to 52 Mhz.

The implementation of IMA as per AF-PHY-0086.001 Inverse Multiplexing for ATM (IMA) Specification Version 1.1 is divided into hardware and software functions. Hardware functions are implemented in the ZL30226/227/228 device and software functions are implemented by the IMA Core (Zarlink or user) software. Additional hardware functions are included to assist in the collection of statistical information to support MIB implementation