ZL30109

• Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E
• Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces
• Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
• Simple hardware control interface
• Accepts two input references and synchronizes to any combination of 2 kHz, 8 kHz, 1.544 MHz, 2.048 MHz, 8.192 MHz, 16.384 MHz or 19.44 MHz inputs
• Provides a range of clock outputs: 1.544 MHz, 2.048 MHz, 16.384 MHz, 19.44 MHz and either 4.096 MHz and 8.192 MHz or 32.768 MHz and 65.536 MHz
• Provides 5 styles of 8 kHz framing pulses and a 2 kHz multi-frame pulse
• Holdover frequency accuracy of 1.5 x 10-7
• Lock, Holdover and selectable Out of Range indication
• Selectable loop filter bandwidth of 1.8 Hz or 922 Hz
• Less than 24 psrms intrinsic jitter on the 19.44 MHz output clock, compliant with OC-3 and STM-1 jitter specifications
• Less than 0.6 nspp intrinsic jitter on all output clocks
• External master clock source: clock oscillator or crystal

The ZL30109 DS1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for multi-trunk DS1 and E1 transmission equipment. The 19.44 MHz output makes the ZL30109 also suitable for SDH line card applications.

The ZL30109 generates a 19.44 MHz clock and ST-BUS and TDM bus clocks and framing signals that are phase locked to one of two input references. It helps ensure system reliability by monitoring its references for accuracy and stability and by maintaining stable output clocks during reference switching operations and during short periods when a reference is unavailable.

The ZL30109 is intended to be the central timing and synchronization resource for network equipment that complies with Telcordia, ETSI, ITU-T and ANSI network specifications.