Features: · Unbuffered Double-data-rate architecture· DDR300 and DDR400- JEDEC design specifi cations· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2.5, 3· Programmable Burst Length (2,4,8)· Programmable Burst type (sequential & interle...
WV3EG6437S: Features: · Unbuffered Double-data-rate architecture· DDR300 and DDR400- JEDEC design specifi cations· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read ...
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Features: · Double-data-rate architecture· DDR266 and DDR333• JEDEC design specifi cations· ...
Features: · Double-data-rate architecture· DDR266 and DDR333 • JEDEC design specifi cations·...
Features: ·Double-data-rate architecture·PC2700@CL=2.5·Bi-directional data strobes (DQS)·Different...
Parameter |
Symbol |
Value |
Units |
Voltage on any pin relative to VSS |
VIN, VOUT |
-0.5 to 3.6 |
V |
Voltage on VCC supply relative to VSS |
VCC, VCCQ |
-0.5 to 3.6 |
V |
Storage Temperature |
TSTG |
-55 to +150 |
|
Operating Temperature |
TA |
0 - 70 |
|
Power Dissipation |
PD |
8 |
W |
Short Circuit Current |
IOS |
50 |
mA |
The WV3EG6437S is a 2x16Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eight 16Mx16 DDR SDRAMs in 66 pin TSOP package mounted on a 200 Pin FR4 substrate.