Features: ·Double-data-rate architecture·PC2700@CL=2.5·Bi-directional data strobes (DQS)·Differential clock inputs (CK & CK#)·Programmable Read Latency 2,2,5 (clock)·Programmable Burst Length (2,4,8)·Programmable Burst type (sequential & interleave)·Edge aligned data output, center aligned...
WV3EG216M64STSU: Features: ·Double-data-rate architecture·PC2700@CL=2.5·Bi-directional data strobes (DQS)·Differential clock inputs (CK & CK#)·Programmable Read Latency 2,2,5 (clock)·Programmable Burst Length (2...
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Features: · Double-data-rate architecture· DDR266 and DDR333• JEDEC design specifi cations· ...
Features: · Double-data-rate architecture· DDR266 and DDR333 • JEDEC design specifi cations·...
Features: ` Fast data transfer rate: PC-2100 and PC-2700` Clock speeds of 133 MHz and 166 MHz` Two...
Symbol |
Parameter |
Rating |
Units |
VIN, VOUT |
Voltage on any pin relative to VSS |
-0.5 ~ 3.6 |
V |
VCC |
Voltage on VCC supply relative to VSS |
-0.5 ~ 3.6 |
V |
VCCQ |
Voltage on VCCQ supply relative to VSS |
-0.5 ~ 3.6 |
V |
TSTG |
Storage Temperature |
-55 ~ +150 |
°C |
TA |
Operating Temperature |
0 ~ 70 |
°C |
PD |
Power Dissipation |
8 |
W |
IOS |
Short Circuit Current |
50 |
mA |
The WV3EG216M64STSU is a 2x16Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eight 16Mx16 DDR SDRAMs in 66 pin TSOP package mounted on a 200 Pin FR4 substrate.
Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lenths allow the same device to be useful for a variety of high bandwidth,high performance memory system applications.
* This product is under development, is not qualifi ed or characterized and is subject to change without notice.