Features: · Double-data-rate architecture· PC2700 @ CL 2.5· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst Length (2,4,8)· Programmable Burst type (sequential & interleave)· Edge aligned data output, cent...
WV3EG32M64ETSU-D3: Features: · Double-data-rate architecture· PC2700 @ CL 2.5· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst L...
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Features: · Double-data-rate architecture· DDR266 and DDR333• JEDEC design specifi cations· ...
Features: · Double-data-rate architecture· DDR266 and DDR333 • JEDEC design specifi cations·...
Features: ·Double-data-rate architecture·PC2700@CL=2.5·Bi-directional data strobes (DQS)·Different...
Parameter | Symbol | Value | Units |
Voltage on any pin relative to VSS | VIN, VOUT | -0.5 to 3.6 | V |
Voltage on VCC supply relative to VSS | VCC | -1.0 to 3.6 | V |
Voltage on VCCQ supply relative to VSS | VCCQ | -0.5 to 3.6 | V |
Storage Temperature | TSTG | -55 to +150 | |
Power Dissipation | PD | 8 | W |
Short Circuit Current | IOS | 50 | mA |
The WV3EG32M64ETSU-D3 is a 32Mx64 Double Data Rate SDRAM memory module based on 256Mb DDR SDRAM components. The module consists of eight 32Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin substrate.
Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the WV3EG32M64ETSU-D3 to be useful for a variety of high bandwidth, high performance memory system applications.