Features: · PC2700 @ CL2.5· Double-data-rate architecture· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst Length (2,4,8)· Programmable Burst type (sequential & interleave)· Auto and self refresh, (8K/64ms...
WV3EG232M64STSU: Features: · PC2700 @ CL2.5· Double-data-rate architecture· Bi-directional data strobes (DQS)· Differential clock inputs (CK & CK#)· Programmable Read Latency 2,2.5 (clock)· Programmable Burst Le...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
Features: · Double-data-rate architecture· DDR266 and DDR333• JEDEC design specifi cations· ...
Features: · Double-data-rate architecture· DDR266 and DDR333 • JEDEC design specifi cations·...
Features: ·Double-data-rate architecture·PC2700@CL=2.5·Bi-directional data strobes (DQS)·Different...
Symbol |
Parameter |
Rating |
Units |
VIN, VOUT |
Voltage on any pin relative to VSS |
-0.5 ~ 3.6 |
V |
VCC |
Voltage on VCC supply relative to VSS |
-0.5 ~ 3.6 |
V |
VCCQ |
Voltage on VCCQ supply relative to VSS |
-0.5 ~ 3.6 |
V |
TSTG |
Storage Temperature |
-55 ~ +150 |
°C |
TA |
Operating Temperature |
0 ~ 70 |
°C |
PD |
Power Dissipation |
8 |
W |
IOS |
Short Circuit Current |
50 |
mA |
The WV3EG232M64STSU is a 2x32Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of eight 32Mx16 DDR SDRAMs in 66 pin TSOP packages mounted on a 200 pin FR4 substrate.
Synchronous design allows precise cycle control with the use of system clock. Data 1/0 transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
* This product is under development, is not qualifi ed or characterized and is subject to change without notice.