Features: • Weighted Rstring architecture• High speed data transfer of up to 65MHz at VDDD = 3.3V• Data Inversion and Double Clock feature• Extremely low output error of 8mV (max) at VDDA = 3.3V• Input pin compatible with uPD16640x family and TMS57485• Logic Pow...
WFP6852A: Features: • Weighted Rstring architecture• High speed data transfer of up to 65MHz at VDDD = 3.3V• Data Inversion and Double Clock feature• Extremely low output error of 8mV ...
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Symbol | Parameter | Min | MAX |
Units |
Notes |
VDDD | Digital Power Supply Voltage | -0.3 | smaller of 6.0 or VDDA |
Volts |
1,2,4 |
VDDA | Analog Power Supply Voltage | -0.3 | 6.0 |
Volts |
1,2,4 |
V10 - V0 | Analog Reference Voltage Inputs | -0.3 | VDDA + 0.3 |
Volts |
1,2 |
VS300-VS1 | Output Voltage | -0.3 | VDDA + 0.3 |
Volts |
1,2 |
VIN | Voltage on any Digital Input | -0.3 | VDDA + 0.3 |
Volts |
1,2,3 |
PD | Operating Power Dissipation | 300 |
mW |
||
TA | Operating Temperature (Ambient Temperature under bias |
-10 | 85 |
1 | |
TSTR | Storage Temperature | -20 | 85 |
1 |
The WFP6852A is a 6-bit, 300-channel signal driver designed for low power SVGA TFT-LCD panel applications. The WFP6852A's form factor has been optimized for low-cost, bending TCP applications. The input pin order and timing are compatible with drivers from TI and NEC.
The WFP6852A's internal architecture includes a resistor-string DAC with the value of the individual resistor segments weighted to reduce signal driver power dissipation by as much as 20% to 60% when compared to non-weighted resistor string DAC architectures.
The input pin order and timing of the WFP6852A allows the panel maker to get the benefits of the Winbond architecture (such as superior uniformity, low power dissipation, and 2.5V interface for reduced EMI and power) while maintaining multisource compatibility.
The WFP6852A also provides input selectable double edge clocking and data inversion features. These may be employed in applications that don't need TI/NEC compatibility.