Features: • Low voltage range: 2.7V3.6V• Ultra-low active, standby power• Easy memory expansion with CE1 and CE2 and OE features• TTL-compatible inputs and outputs• Automatic power-down when deselected• CMOS for optimum speed/powerSpecifications(Above which the ...
WCMA4016U1X: Features: • Low voltage range: 2.7V3.6V• Ultra-low active, standby power• Easy memory expansion with CE1 and CE2 and OE features• TTL-compatible inputs and outputs• Aut...
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Features: • Voltage Range-4.5V5.5V• Low active power-Typical active current: 6 mA @ f ...
Features: • High Speed-55ns and 70ns availability• Voltage range-2.7V3.6V• Ultra...
Features: • High Speed-70ns availability• Voltage range-2.7V3.3V• Ultra low acti...
The WCMA4016U1X is a high-performance CMOS static RAM organized as 262,144 words by 16 bits. This device features advanced circuit design to provide ultra-low active current and standby current. This is ideal for providing more battery life in portable applications such as cellular telephones.
The WCMA4016U1X also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The WCMA4016U1X can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or bothBHE andBLE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE1 LOW, CE2 HIGH and WE LOW).
Writing to the WCMA4016U1X is accomplished by taking Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW.
If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A18). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A18).
Reading from the WCMA4016U1X is accomplished by taking Chip Enables (CE1 LOW and CE2 HIGH) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this datasheet for a complete description of read and write modes.