W981616BH

Features: · 3.3V ±0.3V power supply· Up to 166 MHz clock frequency· 524,288 words x 2 banks x 16 bits organization· Auto Refresh and Self Refresh· CAS latency: 2 and 3· Burst Length: 1, 2, 4, 8, and full page· Burst read, Single Write Mode· Byte data controlled by UDQM and LDQM· Auto-precharge and...

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W981616BH Picture
SeekIC No. : 004545348 Detail

W981616BH: Features: · 3.3V ±0.3V power supply· Up to 166 MHz clock frequency· 524,288 words x 2 banks x 16 bits organization· Auto Refresh and Self Refresh· CAS latency: 2 and 3· Burst Length: 1, 2, 4, 8, and...

floor Price/Ceiling Price

Part Number:
W981616BH
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/11/20

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Product Details

Description



Features:

· 3.3V ±0.3V power supply
· Up to 166 MHz clock frequency
· 524,288 words x 2 banks x 16 bits organization
· Auto Refresh and Self Refresh
· CAS latency: 2 and 3
· Burst Length: 1, 2, 4, 8, and full page
· Burst read, Single Write Mode
· Byte data controlled by UDQM and LDQM
· Auto-precharge and controlled precharge
· 4K refresh cycles/64 mS
· Interface: LVTTL
· Packaged in 50-pin, 400 mil TSOP II



Pinout

  Connection Diagram


Specifications

ITEM SYMBOL
RATING
UNIT
 NOTES
Input, Output Voltage VIN,VOUT
-0.3~ Vcc +0.3
V
 1
Power Supply Voltage VCC,VCCQ
-0.3~4.6
V
 1
Operating Temperature TOPR
0~70
°C
 1
Storage Temperature TSTG
-55~150
°C
 1
Soldering Temperature(10s) TSOLDER
260
°C
 1
Power Dissipation PD
1
W
 1
Short Circuit Output Current IOUT
50
mA
 1
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.


Description

W981616BH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words *2 banks * 16 bits. Using pipelined architecture and 0.175 mm process technology, it delivers a data bandwidth of up to 332M bytes per second (-5). For different applications the W981616BH is sorted into the following speed grades: -5, -6, and 7(L).

Accesses to the SDRAM W91640 are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read W91640 is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W981616BH is ideal for main memory in high performance applications.




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