W981216AH

W981216AH is a high speed synchronous dynamic random access memory (SDRAM) , organized as 2M words x 4 banks x 16 bits. Using pipelined architecture and 0.20um process technology, W981216AH delivers a data bandwidth of up to 266M bytes per second (-75). To fully comply to the personal computer industrial standard, W981216AH is sorted into two speed grades: -75 and -8H. The -75 is compliant to the PC133/CL3 specification, the 8H is compliant to PC100/CL2 specification.

Accesses to the SDRAM W981216AH are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM W981216AH internal counrter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

By having a programmable Mode Register, the system can change burst legnth, latency cycle, interleave or sequential burst to maximize its performance. W981216AH is ideal for main memory in high performance applications.