V53C8128H

Features: 128K x 8-bit organizationRAS access time: 35, 40, 45, 50 nsEDO Page Mode supports sustained I/O data rates up to 71.5 MHzLow power dissipation • V53C8128H-50 - Operating Current 135 mA max - TTL Standby Current 2.0 mA maxLow CMOS Standby Current• V53C8128H 1.0 mA maxRead-M...

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SeekIC No. : 004539945 Detail

V53C8128H: Features: 128K x 8-bit organizationRAS access time: 35, 40, 45, 50 nsEDO Page Mode supports sustained I/O data rates up to 71.5 MHzLow power dissipation • V53C8128H-50 - Operating Current 135...

floor Price/Ceiling Price

Part Number:
V53C8128H
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

 128K x 8-bit organization
 RAS access time: 35, 40, 45, 50 ns
 EDO Page Mode supports sustained I/O data rates up to 71.5 MHz
 Low power dissipation
   • V53C8128H-50
    - Operating Current 135 mA max
    - TTL Standby Current 2.0 mA max
 Low CMOS Standby Current
   • V53C8128H 1.0 mA max
 Read-Modify-Write, RAS-Only Refresh,CAS-Before-RAS Refresh capability
 Refresh Interval
   • V53C8128H 512 cycles/8 ms
 Available in 26/24 pin 300 mil SOJ package



Pinout

  Connection Diagram


Specifications

Ambient TemperatureUnder Bias ................................................. 10°C to +80°C
Storage Temperature (plastic) ................................................... 55°C to +125°C
Voltage Relative to VSS ................................................................ 1.0 V to +7.0 V
Data Output Current .....................................................................................50 mA
Power Dissipation ......................................................................................... 1.0 W



Description

The V53C8128H is a high speed 131,072 x 8 bit CMOS dynamic random access memory. The V53C8128H offers a combination of features: EDO Page Mode for high data bandwidth, fast usable speed, CMOS standby current.

All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Page Mode with extended data out operation allows random access of up to 256 columns (x8) bits within a row with cycle times as short as 14 ns. Because of static circuitry, the CAS clock is not in the critical timing path. The flow-through column address latches allow address pipelining while relaxing many critical system timing requirements for fast usable speed. These features make the V53C8128H ideally suited for graphics, digital signal processing and high performance Peripherals.




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