Features: 128K x 8-bit organizationRAS access time: 30, 35, 40, 45, 50 nsFast Page Mode supports sustained data up to 53 MHzRead-Modify-Write, RAS-Only Refresh,CAS-Before-RAS Refresh capabilityRefresh Interval: 256 cycles/8 msAvailable in 26/24 pin 300 mil SOJ and 28 TSOP-I packagesPinoutSpecifica...
V53C8125H: Features: 128K x 8-bit organizationRAS access time: 30, 35, 40, 45, 50 nsFast Page Mode supports sustained data up to 53 MHzRead-Modify-Write, RAS-Only Refresh,CAS-Before-RAS Refresh capabilityRefre...
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PinoutDescriptionThe V53C104AK-80 belongs to the V53C104A series.V53C104AK-80 is a high speed 262,...
DescriptionThe V53C104DK80 belongs to the V53C104D series.V53C104DK80 is a high speed 262,144*4 bi...
The V53C8125H is a high speed 131,072 x 8 bit CMOS dynamic random access memory. The V53C8125H offers a combination of features: Fast Page Mode for high data bandwidth, fast usable speed, CMOS standby current.
All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Fast Page Mode operation allows random access of up to 512 columns (x9) bits within a row with cycle times as short as 19 ns. Because of static circuitry, the CAS clock is not in the critical timing path. The flowthrough column address latches allow address pipelining while relaxing many critical system timing requirements for fast usable speed. These features make the V53C8125H ideally suited for graphics, digital signal processing and high performance peripherals.