Features: 4M x 4-bit organization EDO Page Mode for a sustained data rate of 50 MHzRAS access time: 50, 60 ns Low power dissipation Read-Modify-Write,RAS-Only Refresh,CAS-Before-RAS Refresh and Hidden Refresh Refresh Interval: 4096 cycles/64 ms Available in 24/26-pin 300 mil SOJ,and 24/26-pin 300 ...
V53C316405A: Features: 4M x 4-bit organization EDO Page Mode for a sustained data rate of 50 MHzRAS access time: 50, 60 ns Low power dissipation Read-Modify-Write,RAS-Only Refresh,CAS-Before-RAS Refresh and Hidd...
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PinoutDescriptionThe V53C104AK-80 belongs to the V53C104A series.V53C104AK-80 is a high speed 262,...
DescriptionThe V53C104DK80 belongs to the V53C104D series.V53C104DK80 is a high speed 262,144*4 bi...
The V53C316405A is a 4,194,304 x 4 bit highperformance CMOS dynamic random access memory. The V53C316405A offers Page mode operation with Extended Data Output. The V53C316405A has asymmetric address, 12-bit row and 10-bit column.
All inputs are TTL compatible. EDO Page Mode operation allows random access up to 1024 x 4 bits, within a page, with cycle times as short as 20ns.
These features make the V53C316405A ideally suited for a wide variety of high performance computer systems and peripheral applications.