Features: 128K x 16-bit organization EDO Page Mode for a sustained data rate of 83 MHz RAS access time: 30, 35, 40, 45, 50 ns Dual CAS Input Low power dissipation Read-Modify-Write, RAS-Only Refresh,CAS-Before-RAS Refresh Refresh Interval: 512 cycles/8 ms Available in 40-pin 400 mil SOJ and ...
V53C16128H: Features: 128K x 16-bit organization EDO Page Mode for a sustained data rate of 83 MHz RAS access time: 30, 35, 40, 45, 50 ns Dual CAS Input Low power dissipation Read-Modify-Write, RAS-Only Ref...
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PinoutDescriptionThe V53C104AK-80 belongs to the V53C104A series.V53C104AK-80 is a high speed 262,...
DescriptionThe V53C104DK80 belongs to the V53C104D series.V53C104DK80 is a high speed 262,144*4 bi...
The V53C16128H is a 131,072 x 16 bit highperformance CMOS dynamic random access memory. The V53C16128H offers Page mode with Extended Data Output. EDO Page Mode operation allows random access up to 256 x 16 bits, within a page, with cycle times as short as 12ns. An address, CAS and RAS input capacitances are reduced to minimize the loading. The V53C16128H has asymmetric address, 9-bit row and 8-bit column.
All inputs are TTL compatible. The V53C16128H is best suited for graphics, and DSP applications requiring high performance memories.