UT1553B RTI

Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

The RTI uses three internal registers to allow the host to  control the RTI operation and monitor its status. The UT1553B RTI  uses the following inputs Control (CTRL ), Chip Select  (CS ), Read/Write (RD/WR), and ADDR IN (0) to read the  16-bit System Register or write to the 8-bit Control Register.

The Control Register toggles bits in the MIL-STD-1553B  status word, enables biphase inputs, selects terminal active  flag, and puts the part in self-test. The System Register  supplies operational status of the UT1553B RTI to the host.  The Last Command Register saves the command word for  a Transmit Last Command mode code, along with  operational status from the System Register.