UT1553B

The RTI uses three internal registers of the UT1553B to allow the host to control the RTI operation and monitor its status. The host uses the following inputs Control (CTRL), Chip Select (CS), Read/Write (RD/WR), and ADDR IN (0) to read the 16-bit System Register or write to the 8-bit Control Register. The Control Register toggles bits in the MIL-STD-1553B status word, enables biphase inputs, selects terminal active flag, and puts the part in self-test. The System Register supplies operational status of the UT1553B RTI to the host. The Last Command Register saves the command word for a Transmit Last Command mode code, along with operational status from the System Register.

The 8-bit write-only Control Register manages the operation of the RTI of the UT1553B. Write to the Control Register by applying a logic zero to CS, CTRL, RD/WR, and ADDR IN (0); if ADDR IN (0) is a logic one a master reset occurs. Data is loaded into the Control Register via I/O pins DATA(7:0). Control Register writes must occur 50ns before the rising edge of COMSTR to latch data in the outgoing status word.