USC1070

Features: SpecificationsDescription The USC1070 has the following features including Low power CMOS;One pulse conversion 7 bit resolution;10 MHz sampling rate;TTL&CMOS interface;Three state outputs;20&24 pin, 300 mil DIP;Military&industrial temp ranges;Half LSB versions available;Seve...

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SeekIC No. : 004538838 Detail

USC1070: Features: SpecificationsDescription The USC1070 has the following features including Low power CMOS;One pulse conversion 7 bit resolution;10 MHz sampling rate;TTL&CMOS interface;Three state out...

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Part Number:
USC1070
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/7/2

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Product Details

Description



Features:






Specifications






Description

The USC1070 has the following features including Low power CMOS;One pulse conversion 7 bit resolution;10 MHz sampling rate;TTL&CMOS interface;Three state outputs;20&24 pin, 300 mil DIP;Military&industrial temp ranges;Half LSB versions available;Several package options.

Conversion is accomplished with only one pulse. Data appears at the outputs following the conversion clock transition. The converter is ready after a minimum reset time. No extra clock steps are required to bring data out.Underrange and overrange status lines indicate whether the input signal is below or above the input range. The nominal input voltage range is -3.2V to +3.2V and +/-2.SV has been used in many applications.The family of USC1070 may easily be interfaced to TTL&CMOS logic. The standard converters have open-drain N-channel devices to the digital ground, Vgnd. The llxsc devices have tri-state output drivers to connect directly to a data bus.Both  military  and industrial  temperature  range  devices  are available. Special test requirements and mil screening (883C) may be ordered. A wide variety of packages are also available. The standard packages are 300 mil 24 pin ceramic, 300 mil 20 pin plastic, 600 mil 24 pin ceramic, and 24 pin Leadless Chip Carriers (LCC) packages. Die are also available for hybrids and other special packaging.

The internal features of the flash converter family consist of a set of reference resistors, 130 voltage comparators,NAND gates, 128 encoders, output buffers, and clock generation circuitry.A reference voltage is applied between +Vref and -Vref driving a resistor with 128 taps. The taps provide the comparators.In the RESET mode the comparator outputs are disabled.Three control lines are used: CLOCK, CE (Chip Enable), and PHASE. The PHASE line of USC1070 determines the active state of the CLOCK and CE lines. With a high PHASE line, Vin is sampled on the falling edge of the CLOCK line and CE is active low. The state of CLOCK for a sample and CE is active high for a low PHASE line. The Chip Enable line activates the digital outputs. With the standard devices external resistors outputs of the 3-state devices (USC117x) will go to a high impedance mode of the CLOCK the outputs will be in a high state.






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