TXC-06103

The TranSwitch PHAST-3N (TXC-06103) is an STM-1/STS-3/ STS- 3c section, line and path overhead termination device that provides a terminal side Telecom Bus interface. The PHAST-3N device provides either a serial or parallel interface on the line side. The serial interface provides 155 MHz clock recovery and clock synthesis. Line and section overhead bytes are processed. The PHAST-3N performs pointer tracking, and receive and transmit pointer justification. The PHAST-3N also performs POH byte processing. TOH (RSOH and MSOH) and POH bytes are written into RAM locations for microprocessor access or provided via interfaces for external access. In the transmit direction, the TXC-06103 will either interface to downstream timing or provide the timing signals. The transmit POH bytes can be inserted from RAM, a serial POH interface, a mate PHAST-3N device for path and line ring applications, or directly from the terminal side.

The TXC-06103 can generate line and path AIS in the receive and transmit directions. For testing, the device provides boundary scan, a PRBS generator and analyzer, B2 and B3 byte BER measurements, programmable BIP error mask generation, line and terminal loopback, and STS-1 terminal loopback. The device provides either Motorola or Intel microprocessor access. Performance counters can be configured to be saturating or roll-over. The interrupts, with mask bits, can be programmed for activation on positive, negative, or positive and negative alarm transitions, or positive levels. A software polling register is also provided.