TXC-04252

Features:

• Add/drop four 2.048 Mbit/s signals from STM-1/VC-4, STS-3/AU-3 or STS-1 buses
• Independent add and drop bus timing modes
• Selectable HDB3 positive/negative rail or NRZ E1 interface. Performance counter provided for coding violations.
• Digital desynchronizer
• Drop buses are monitored for parity, loss of clock, upstream AIS and H4 multiframe errors
• Performance counters are provided for TU/VT pointer movements, BIP-2 errors and Far End Block Errors (FEBEs)
• TU/VTs are monitored for Loss Of Pointer, New Data Flags (NDFs), AIS, Remote Defect Indication (RDI), and
   size errors (S-bits)
• V5 Byte Signal Label Mismatch and Unequipped detection
• E1 facility and line loopbacks, generation of BIP-2 and FEBE errors, and send RDI capability
• Intel / Motorola / Multiplexed-compatible microprocessor bus interface with interrupt capability
• Programmable internal RISC processor implements VT-POH and VT-alarm handling
• J2 16-byte ETSI trail trace comparison
• Optional V4 receive and transmit byte access
• TU tandem connection processing (N2 byte)
• IEEE 1149.1 standard boundary scan
• Single +5 V ± 5 % power supply
• 160-lead plastic quad flat package or 208-lead PBGA (17 mm x 17 mm)


Application

• STM-1/STS-3/STS-1 to 2.048 Mbit/s add/drop mux/demux
• Unidirectional or bidirectional ring applications
• STM-1/STS-3/STS-1 termination terminal mode multiplexer
• STM-1/STS-3/STS-1 test equipment


Pinout




Specifications

Parameter	SYMBOL	Min.	Max.	Unit	Conditions
Supply voltage	VDD	-0.5	+6.0	V	Note 1
DC input voltage	VIN	-0.5	VDD + 0.5	V	Note 1
Storage temperature range	TS	-55	150		Note 1
Ambient Operating Temperature	TA	-40	85		0 ft/min linear airflow
Moisture Exposure Level	ME	5		Level	per EIA/JEDEC JESD22-A112-A
Relative Humidity, during assembly	RH	30	60	%	Note 2
Relative Humidity, in-circuit	RH	0	100	%	non-condensing
ESD Classification	ESD	Absolute value 2000		V	Note 3
Latch-up	LU				JEDEC STD-17

Notes:
1. Conditions exceeding the Min or Max values may cause permanent failure. Exposure to conditions near the Min
    or Max values for extended periods may impair device reliability.
2. Pre-assembly storage in non-drypack conditions is not recommended. Please refer to the instructions on
    the "CAUTION" label on the drypack bag in which devices are supplied.
3. Absolute value tested per MIL-STD-883D, Method 3015.7.


Description

The QE1M  Mapper device is designed for add/drop multiplexer, terminal multiplexer, and dual and single unidirectional ring applications. Four E1 2.048 Mbit/s signals are mapped to and from asynchronous Tributary Unit-12 (TU-12) or Virtual Tributary 2 (VT2) formats. The QE1M interfaces to a multiple-segment, byte-parallel SDH/SONET-formatted bus at the 19.44 Mbit/s byte rate for STM-1/STS-3 operation or at the 6.48 Mbit/s byte rate for STS-1 operation. The E1 2.048 Mbit/s signals can be either HDB3 positive/negative rail- or NRZ-formatted signals. The QE1M provides performance counters, alarm detection, and the ability to generate errors and Alarm Indication Signals (AIS). E1 facility and line loopback capabilities are also provided.

The QE1M bus interface is used to connect to other TranSwitch devices such as the STM-1/STS-3/STS-3c Overhead Terminator (SOT-3), TXC-03003 or TXC-03003B, to form an STM-1/STS-3 add/drop or terminal system.