TXC-04216

Features:

• Add/drop sixteen 2.048 Mbit/s signals from an STM-1 VC-4/AU-3, STS-3, or an STS-1
• Independent add and drop bus timing modes
• Selectable HDB3 positive/negative rail or NRZ E1 interface. Performance counter provided for illegal
   coding violations.
• Digital desynchronizers
• J2 16-byte ETSI trail trace comparison
• Drop buses are monitored for parity, loss of clock, upstream AIS and H4 multiframe errors
• TU Tandem Connection ETSI message processing and generation
• Performance counters are provided for TU/VT pointer movements, BIP-2 errors and Far End Block Errors (REIs)
• TU/VTs are monitored for Loss Of Pointer, New Data Flags (NDFs), AIS, Remote Defect Indication (RDI), and
   size errors (S-bits)
• V5 Byte Signal Label Mismatch and Unequipped detection
• E1 facility and line loopbacks, generation of BIP-2 and REI errors, and send RDI capability
• Intel / Motorola compatible microprocessor bus interface with interrupt capability
• Programmable internal RISC processor implements VT-POH and VT-alarm handling
• Boundary scan capability (IEEE 1149.1)
• Single +5V, ±5% power supply
• 388-lead plastic ball grid array (35 x 35 mm) package



Application

• STM-1/STS-3/STS-1 to 2.048 Mbit/s add/drop mux/demux
• Unidirectional or bidirectional ring applications
• STM-1/STS-3/STS-1 termination terminal mode multiplexer
• STM-1/STS-3/STS-1 test equipment


Specifications

Parameter	SYMBOL	Min.	Max.	Unit	Conditions
Supply voltage	VDD	-0.5	+6.0	V	Note 1
DC input voltage	VIN	-0.5	VDD + 0.5	V	Note 1
Storage temperature range	TS	-55	150		Note 1
Ambient Operating Temperature	TA	-40	85		0 ft/min linear airflow
Component Temperature x Time	TI		270 x 5	x s	Note 1
Moisture Exposure Level	ME	5		Level	per EIA/JEDEC JESD22-A112-A
Relative Humidity, during assembly	RH	30	60	%	Note 2
Relative Humidity	RH	0	100	%	non-condensing
ESD Classification	ESD	Absolute value 1500		V	Note 3
Latch-up	LU				Meets JEDEC 78

Notes:
1. Conditions exceeding the Min or Max values may cause permanent failure. Exposure to conditions near the Min
    or Max values for extended periods may impair device reliability.
2. Pre-assembly storage in non-drypack conditions is not recommended. Please refer to the instructions on
    the "CAUTION" label on the drypack bag in which devices are supplied.
3. Test method for ESD per MIL-STD-883D, Method 3015.7.


Description

The E1 Mapper 16-Channel device is designed for add/drop multiplexer, terminal multiplexer, and dual and single unidirectional ring applications. Four field-proven QE1M Quad E1 Mapper chips are interconnected in a single compact package to permit higher application board densities.

Sixteen E1 2.048 Mbit/s signals are mapped to and from asynchronous Tributary Unit-12s (TU-12s) or Virtual Tributary 2s (VT2s). The E1Mx16 interfaces to a multiple-segment, byte-parallel SDH/SONET-formatted Telecom Bus at the 19.44 Mbit/s byte rate for STM-1/STS-3 operation or at the 6.48 Mbit/s byte rate for STS-1 operation. This Bus permits the E1Mx16 to connect directly to other TranSwitch devices in application designs. The E1 signals can be either HDB3 positive/negative rail or NRZ format. The E1Mx16 provides performance counters, alarm detection, and the ability to generate errors and Alarm Indication Signals (AIS). E1 facility and line loopback capabilities are also provided.