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TUA6034

Features: • Suitable for PAL, NTSC, DVB, ISDB-T and ATSC• Wideband AGC detector for internal tuner AGC− 5 programmable take-over points− 2 programmable time constants• Low phase noise• Full ESD protection• High impedance mixer input (common emitter) for LO...

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SeekIC No. : 004533808 Detail

TUA6034: Features: • Suitable for PAL, NTSC, DVB, ISDB-T and ATSC• Wideband AGC detector for internal tuner AGC− 5 programmable take-over points− 2 programmable time constants• ...

TUA6034 Data Sheet

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Part Number:
TUA6034
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Suitable for PAL, NTSC, DVB, ISDB-T and ATSC
• Wideband AGC detector for internal tuner AGC− 5 programmable take-over points− 2 programmable time constants
• Low phase noise
• Full ESD protection
• High impedance mixer input (common emitter) for LOW band
• Low impedance mixer input (common base) for MID band
• Low impedance mixer input (common base) for HIGH band
• 2 pin oscillator for LOW band
• 2 pin oscillator for MID band
• 4 pin oscillator for HIGH band
• Symmetrical IF preamplifier with low output impedance able to drive a compensated SAW filter (500 //40 pF)
• 4 independent I2C addresses
• I2C bus protocol compatible with 3.3 V and 5V micro-controllers up to 400 kHz
• High voltage VCO tuning output
• 4 PNP ports
• 1 NPN port/ADC input
• Stand-by mode
• Internal LOW/MID/HIGH band switch
• Lock-in flag
• 6 programmable reference divider ratios (24, 28, 32, 64, 80, 128)
• 4 programmable charge pump currents


Application

• The IC is suitable for PAL, NTSC, DVB-C, DVB-T, ISDB-T and ATSC tuners.The focus is on digital terrestrial.
• The AGC stage makes the tuner AGC independent of the Video-IF AGC.


Pinout

Connection Diagram


Specifications

Parameter1) Symbol
Limit Values
 Unit Remarks
min.
max.
Supply voltage VCC
-0.3
6
 V  
Ambient temperature TA
-40
TAmax2)
  
Junction temperature TJ
+125
  
Storage temperature TStg
-40
+125
  
Temperature difference junction to case3) TJC
2
 K  
CP VCP
-0.3
3
 V  
ICP
1
 mA  
Crystal oscillator pin
XTAL		 VQ
6
 V  
IQ
-5
mA  
10. Bus input/output SDA VSDA
-0.3
6
 V  
Bus output current SDA ISDA(L)
10
 mA open collector
Bus input SCL VSCL
-0.3
6
 V  
Chip address switch AS VAS
-0.3
6
 V  
VCO tuning output
(loop filter)		 VVT
-0.3
35
 V  
NPN port output
voltage of P4		 VP4
-0.3
6
 V open collector
NPN port output
current of P4		 IP4(L)
-1
10
 mA open collector,
tmax = 0.1 s at 5.5 V
P4/ADC input/output
voltage		 VP4/ADC
-0.3
6
 V  
NPN port output
current of P4		 IP4/ADC(L)
-1
10
 mA open collector,
tmax = 0.1 s at 5.5 V
PNP port output voltage
of P0, P1, P2, P3		 VP0, 1, 2, 3
-0.3
6
 V open collector
PNP port output
current of P1		 IP1(L)
+1
-25
 mA open collector,
tmax = 0.1 s at 5.5 V
PNP port output
current of P0		 IP0(L)
+1
-10
 mA open collector,
tmax = 0.1 s at 5.5 V
PNP port output
current of P2, P3		 IP2, 3(L)
+1
-5
 mA open collector,
tmax = 0.1 s at 5.5 V
Total port output
current of
PNP ports		 IP(L)
-40
 mA tmax = 0.1 s at 5.5 V
Mix inputs LOW band VLOW
-0.3
3
 V  
Mix inputs MID/HIGH
band		 VMID/HIGH
2
 V  
IMID/HIGH
-5
6
 mA  
VCO base voltage VB
-0.3
3
 V LOW, MID and HIGH band scillators
VCO collector voltage VC
6
 V LOW, MID and HIGH band scillators
all pins VESD
2
 kV  

1) All values are referred to ground (pin), unless stated otherwise.Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin.


Description

The TUA6034, TUA6036 'TAIFUN' device combines a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners and in settopbox applications.

The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch.

The PLL block with four independently selectable chip addresses forms a digitally programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25,50, 62.5, 125, 142.86 or 166.7 kHz. The tuning process is controlled by a microprocessor via an I2C bus. The device has 5 output ports, one of them (P4) can also be used as ADC input port. A flag is set when the loop is locked. The lock flag can be read by the processor via the I2C bus.




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