Features: · 0.5Msps to 50Msps sampling frequency· 40mW @5Msps, 150mW @ 50Msps·2.5V supply voltage with 2.5V/3.3V compatibility for digital I/O· Input range: 2Vpp differential· SFDR up to 77dB @ 50Msps, Fin=15MHz· ENOB up to10.5 bits @ 50Msps, Fin=15MHz· Built-in reference voltage with external bia...
TSA1201: Features: · 0.5Msps to 50Msps sampling frequency· 40mW @5Msps, 150mW @ 50Msps·2.5V supply voltage with 2.5V/3.3V compatibility for digital I/O· Input range: 2Vpp differential· SFDR up to 77dB @ 50Ms...
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Symbol |
Parameter |
Values |
Unit |
AVCC |
Analog Supply voltage 1) |
0 to 3.3 |
V |
DVCC |
Digital Supply voltage 1) |
0 to 3.3 |
V |
VCCBI |
Digital buffer Supply voltage 1) |
0 to 3.3 |
V |
VCCBE |
Digital buffer Supply voltage 1) |
+150 |
V |
Tstg |
Storage temperature |
2 |
°C |
ESD |
Electrical Static Discharge - HBM - CDM-JEDEC Standard |
2 1.5 |
KV |
The TSA1201 is a 12-bit, 50MHz maximum sampling frequency Analog to Digital converter using a CMOS technology combining high performances and very low power consumption. The TSA1201 is based on a pipeline structure and digital error correction to provide excellent static linearity and achieve 10.5 effective bits at Fs=50Msps, and Fin=15MHz, with a global power consumption of 150mW.
The TSA1201 features adaptative behaviour to the application. Its architecture allows to sample from 0.5Msps up to 50Msps, with a programmable power consumption which makes the application board even more optimized. It integrates a proprietary track-and-hold structure to ensure an high analog andwidth of 1GHz and enable IF-sampling. Several features are available on the device. A voltage reference is integrated in the circuit. Differential or single-ended nalog inputs can be applied. The output data can be coded into two differential formats. A Data Ready signal is raised as the data is valid on the output and can be used for synchronization purposes.
The TSA1201 is available in extended (-40°C to +85°C) temperature range, in small 48 pins TQFP package.