Features: • Versatile Multiplexing Interface to Allow Lower Pixel Bus Rate
• High Level of Integration to Provide Lower System Cost and Complexity
• Direct VGA Pass-Through Capability
• Versatile Pixel Bus Interface to Support Little-Endian and Big-Endian Data Formats
• True-Color (direct-addressing) Mode to Support Various 24-Bit and 16-Bit Formats
• Compatible with 5-6-5 XGA Format
• Compatible with 5-5-5 TARGA Format
• Interfaces Directly to TMS34010/TMS34020 and Other Graphics Processors
• Triple 8-bit D/A ConvertersPinout
SpecificationsSupply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to VDD + 0.5 V
Analog output short-circuit duration to any power supply or common . . . . . . unlimited
Operating free-air temperature range, TA: TLC34076C . . . . . . . . . . . . . . . 0°C to 70°C
TLC34076M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175°C
Case temperature for 10 seconds TC: FN and GA package . . . . . . . . . . . . . . . . . .260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . .260°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated
under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to the GND terminal.DescriptionThe TLC34076C and TLC34076M are commercial and military versions, respectively, of a Texas Instruments video interface palette (VIP) designed for lower system cost with a higher level of integration. Lower system cost and higher integration are achieved by incorporating all the high-speed timing, synchronizing, and multiplexing logic usually associated with graphics systems into one device, thus greatly reducing chip count. Since all high-speed signals (excluding the clock source) are contained on-chip, RF noise considerations are simplified. Maximum flexibility of TLC34076 is provided through the pixel multiplexing scheme, which allows for 32-, 16-, 8-, and 4-bit pixel buses to be accommodated without any circuit modification. This enables the system to be easily reconfigured for varying amounts of available video RAM (VRAM). Data can be split into 1, 2, 4, or 8 bit-planes. The TLC34076 is software-compatible with the IMSG176/8 and BrooktreeE BT476/8 color palettes.
The TLC34076 VIP is pin-for-pin compatible with the TLC34075 VIP, but contains additional 24- and 16-bit true-color modes, as well as the ability to select little-endian or big-endian data formats for the pixel bus frame buffer interface.
The TLC34076 features a separate VGA bus that allows data from the feature connector of most VGA-supported personal computers to be fed directly into the palette without the need for external data multiplexing. This allows a replacement graphics board to remain downward compatible by utilizing the existing graphics circuitry often located on the motherboard.
The 24- and 16-bit true-color modes that are provided allow bits of color information to be transferred directly from the pixel port to the digital-to-analog converters (DACs). Depending on which true-color mode is selected, an overlay function is provided using the remaining bits of the pixel bus. The 24-bit modes allow overlay with the eight remaining bits of the pixel bus, while the TARGAE (5-5-5) 16-bit mode allows overlay with the one remaining bit of the divided pixel bus.
The TLC34076 has a 256-by-24 color lookup table with triple 8-bit video D/A converters capable of directly driving a doubly terminated 75-W line. Sync generation is incorporated on the green output channel. HSYNC and VSYNC are fed through the device and optionally inverted to indicate screen resolution to the monitor. A palette page register provides the additional bits of palette address when 1, 2, or 4 bit-planes are used. This allows the screen colors to be changed with only one MPU write cycle.
Clocking of TLC34076 is provided through one of four or five inputs (three TTL compatible and either one ECL compatible or two TTL compatible) and is software selectable. The video and shift clock outputs provide a software-selected divide ratio of the chosen clock input.
The TLC34076 can be connected directly to the serial port of VRAM devices, eliminating the need for any discrete logic. Support for split shift register transfers is also provided.
TLC34076 Data Sheet
