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TLC320AD75C

Features: Single 5-V (Analog/Digital) Power Level and 3.3-V to 5-V Digital Interface LevelSample Rates up to 48 kHz20-Bit Resolution ConversionsSignal-to-Noise Ratio (EIAJ) of 100 dB for the ADCTotal Harmonic Distortion + Noise of 0.0017% for the ADCSignal-to-Noise Ratio (EIAJ) of 104 dB for the D...

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SeekIC No. : 004520598 Detail

TLC320AD75C: Features: Single 5-V (Analog/Digital) Power Level and 3.3-V to 5-V Digital Interface LevelSample Rates up to 48 kHz20-Bit Resolution ConversionsSignal-to-Noise Ratio (EIAJ) of 100 dB for the ADCTota...

TLC320AD75C Data Sheet

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Part Number:
TLC320AD75C
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

Single 5-V (Analog/Digital) Power Level and 3.3-V to 5-V Digital Interface Level
Sample Rates up to 48 kHz
20-Bit Resolution Conversions
Signal-to-Noise Ratio (EIAJ) of 100 dB for the ADC
Total Harmonic Distortion + Noise of 0.0017% for the ADC
Signal-to-Noise Ratio (EIAJ) of 104 dB for the DAC
Total Harmonic Distortion + Noise of 0.0013% for the DAC
Internal Voltage Reference (Vref)
Serial Port Interface
Differential Architecture
DAC Provides PWM Output
Digital De-emphasis Filtering for 32-, 44.1-, and 48-kHz Sample Rates for the DAC
Digital Attenuation/Soft Mute Function for the DAC
Small 56-Pin DL Plastic Small-Outline Package


Pinout

Connection Diagram


Specifications

Supply voltage range, AVDD , LVDD  (see Note 1) . . . . . . . . . . . . . . . . . . . 0.3 V to 6.5 V
Supply voltage range, VDD1 , V35A  (see Note 2) . . . . . . . . . . . . . . . . . . . .0.3 V to 6.5 V
Supply voltage range, PV DD(L/R) , VDD2 , V35D , XVDD (see Note 3) . . . .  0.3 V to 6.5 V
Analog input voltage range, INLP, INLM, INRP, INRM . . . . . . .. .   0.3 V to AVDD  + 0.3 V
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.3 V to V DD1/2+ 0.3 V
Output voltage range, VO : L1, L2, R1, R2 . . . . . . . . . . . . . . . . .  0.3 V to AVDD  + 0.3 V
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to 70
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to 150
Case temperature for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . 260


Description

The sigma-delta ADC converter TLC320AD75C consists of an oversampling analog modulator and digital decimation filter.

The sigma-delta DAC TLC320AD75C incorporates an interpolation finite impulse-response (FIR) filter and oversampled modulator. The pulse-width-modulation (PWM) digital output feeds an external low-pass filter to recover the analog audio signal. Two control registers configure the DAC. The attenuation register controls the attenuation range, de-emphasis enable, and mute selection. The system register of TLC320AD75C controls the data format and de-emphasis filter-sample rate.




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