Features: ` Supports UXGA Resolution (Output Pixel Rates up to 165 MHz)
` Digital Visual Interface (DVI) and High-Bandwidth Digital Content Protection (HDCP) Specification Compliant1
` True-Color, 24 Bits/Pixel, 48-Bit Dual Pixel Output Mode, 16.7M Colors at 1 or 2 Pixels Per Clock
` Laser-Trimmed (50-Ω) Input Stage for Optimum Fixed Impedance Matching
` Skew Tolerant up to One Pixel Clock Cycle (High Clock and Data Jitter Tolerance)
` 4x Over-Sampling for Reduced Bit-Error Rates and Better Performance Over Longer Cables
` Reduced Power Consumption From 1.8-V Core Operation With 3.3-V I/Os and Supplies2
` Reduced Ground Bounce Using Time-Staggered Pixel Outputs
` Lowest Noise and Best Power Dissipation Using TI 100-Terminal TQFP PowerPAD Packaging
` Advanced Technology Using TI's 0.18-µm EPIC-5 CMOS Process
` Embedded Preprogrammed High-Bandwidth Digital Content Protection (HDCP) KeysPinout
SpecificationsSupply voltage range, DVDD, AVDD, OVDD, PVDD . . . . . . . . . . . . . . . . . . . −0.3 V to 4 V
Input voltage, logic/analog signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 4 V
Operating ambient temperature range . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−65°C to 150°C
Case temperature for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . .260°C
ESD protection, all terminals . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Human Body Model
JEDEC latch-up (EIA/JESD78) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DescriptionThe TFP503 is a Texas Instruments PanelBus flat-panel display product, part of a comprehensive family of end-to-end DVI 1.0-compliant solutions. Targeted primarily at desktop LCD monitors, DLP and LCD projectors, and digital TVs, the TFP503 finds applications in any design requiring high-speed digital interface with the additional benefit of an extremely robust and innovative encryption scheme for digital content protection.
The TFP503 supports display resolutions up to UXGA, including the standard HDTV formats, in 24-bit true color pixel format. The TFP503 offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reduced ground-bounce. PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultra-low ground inductance.
The TFP503 combines PanelBus circuit innovation and unique implementation for HDCP key protection with TI's advanced 0.18-µm EPIC-5 CMOS process technology to achieve a completely secure, reliable, low-powered, low-noise, high-speed, digital interface solution.
The TFP503 comes with embedded preprogrammed HDCP keys, thus eliminating the need for an external storage device to store the HDCP keys or the need for the customer to purchase HDCP keys from the licensing authority. An encryption scheme ensures that the embedded HDCP keys are encrypted, thus providing highest level of key security.
TFP503 Data Sheet
