Features: ` 12-bit resolution` Sampling rate up to 70 MHz` -3 dB bandwidth of 245 MHz` 5 V power supplies and 3.3 V output power supply` Binary or twos complement CMOS outputs` In-range CMOS compatible output` TTL and CMOS compatible static digital inputs` TTL and CMOS compatible digital outputs` ...
TDA8768A: Features: ` 12-bit resolution` Sampling rate up to 70 MHz` -3 dB bandwidth of 245 MHz` 5 V power supplies and 3.3 V output power supply` Binary or twos complement CMOS outputs` In-range CMOS compati...
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Symbol | Parameter | Conditions | Min | Typ | Max | Unit |
VCCA | analog supply voltage | 4.75 | 5.0 | 5.25 | V | |
VCCD | digital supply voltage | 4.75 | 5.0 | 5.25 | V | |
VCCO | output supply voltage | 3.0 | 3.3 | 3.6 | V | |
ICCA | analog supply current | 78 | 87 | mA | ||
ICCD | digital supply current | 27 | 30 | mA | ||
ICCD | output supply current | fCLK = 20 MHz fi = 400 kHz |
3 | 4 | mA | |
INL | integral non-linearity | fCLK = 20 MHz fi = 400 kHz |
±2.6 | ±4.5 | LSB | |
DNL | differential non-linearity (no missing code) |
fCLK = 20 MHz fi = 400 kHz |
±0.5 | +1.1 - 0.95 |
LSB | |
fCLK(max) | maximum clock frequency TDA8768AH/4 TDA8768AH/5 TDA8768AH/7 |
- 40 55 70 |
- MHz MHz MHz | |||
Ptot | total power dissipation | fCLK = 55 MHz fi = 20 MHz |
550 | 660 | mW |
The TDA8768AH is a biCMOS 12-bit Analog-to-Digital Converter (ADC) optimized for GSM and EDGE cellular nfrastructures, professional telecommunications and imaging, and advanced FM radio. It converts the analog input signal into 12-bit binary coded digital words at a maximum sampling rate of 70 MHz. All static digital inputs (SH, CE and OTC) are TTL and CMOS compatible and all outputs are CMOS compatible. A sine wave clock input signal can also be used.