T2316405A

The T2316405A and T2316407A is a randomly accessed solid state memory containing 16,777,216 bits organized in a x 4 configuration. T2316405A and T2316407A offer Fast Page mode with Extended Data Output (EDO).

During READ or WRITE cycles, each of the 4 memory bits (1 bit per I/O) is uniquely addressed through the 22 address bits, T2316405A and T2316407A are entered 11 bits (A0-A10) at a time. RAS latches the first 11 bits and CAS latches the latter 11 bits.

A READ or WRITE cycle is selected with the WE input. A logic HIGH on WE dictates READ mode while a logic LOW on WE dictates WRITE mode. During a WRITE cycle, data -in is latched by the falling edge of WE or CAS , whichever occurs last. When WE goes Low prior to CAS going LOW ( EARLY WRITE cycle), the output pins of T2316405A and T2316407A remain open (High-Z) until the next CAS cycle.

A Late Write or Read-Modify-Write occurs. When WE falls after CAS was taken LOW (Late Write cycle). OE must be taken HIGH to disable the data-outputs prior to applying input data.

The four data inputs and four data outputs of T2316405A and T2316407A are routed through four pins using common I/O, and pin direction is controlled by WE and OE .