STB50NE10L

MOSFET RO 511-STB40NF10L

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SeekIC No. : 00165010 Detail

STB50NE10L: MOSFET RO 511-STB40NF10L

floor Price/Ceiling Price

Part Number:
STB50NE10L
Mfg:
STMicroelectronics
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/4

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Product Details

Quick Details

Transistor Polarity : N-Channel Drain-Source Breakdown Voltage : 100 V
Gate-Source Breakdown Voltage : +/- 20 V Continuous Drain Current : 50 A
Resistance Drain-Source RDS (on) : 0.24 Ohms Configuration : Single
Maximum Operating Temperature : + 175 C Mounting Style : SMD/SMT
Package / Case : D2PAK Packaging : Tube    

Description

Transistor Polarity : N-Channel
Gate-Source Breakdown Voltage : +/- 20 V
Configuration : Single
Maximum Operating Temperature : + 175 C
Mounting Style : SMD/SMT
Drain-Source Breakdown Voltage : 100 V
Package / Case : D2PAK
Packaging : Tube
Continuous Drain Current : 50 A
Resistance Drain-Source RDS (on) : 0.24 Ohms


Features:

  TYPICAL RDS(on) = 0.020
  EXCEPTIONAL dv/dt CAPABILITY
  100% AVALANCHE TESTED
  LOW GATE CHARGE AT 100
 APPLICATION ORIENTED CHARACTERIZATION
 FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE



Application

HIGH CURRENT, HIGH SPEED SWITCHING
SOLENOID AND RELAY DRIVERS
MOTOR CONTROL, AUDIO AMPLIFIERS
DC-DC & DC-AC CONVERTERS
AUTOMOTIVE ENVIRONMENT



Specifications

Symbol
Parameter
Value
Unit
VDS
Drain-source Voltage (VGS = 0)
80
V
VDGR
Drain- gate Voltage (RGS = 20 k)
80
V
VGS
Gate-source Voltage
±20
V
ID
Drain Current (continuous) at Tc = 25
50
A
ID
Drain Current (continuous) at Tc = 100
35
A
IDM(•)
Drain Current (pulsed)
200
A
Ptot
Total Dissipation at Tc = 25
150
W
Derating Factor
1
W/
dv/dt (1)
Peak Diode Recovery voltage slope
6
V/ns
Tstg
Storage Temperature
-65 to 175
°C
Tj
Max. Operating Junction Temperature
175
°C
(l) Pulse width limited by safe operating area (1) ISD 50 A,di/dt 300 A/ms, VDD V(BR)DSS, Tj TJMAX


Description

This STB50NE10L Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeÔ " strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.




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