PMB2302

The PMB 2302, PMB 2303 are single chip dual Phase Locked Loop (PLL) synthesizers with programmable frequency dividers for use in mobile communication equipment. It is fabricated using Siemens B6HF silicon bipolar process.

The circuit of PMB2302 consists of high speed dual modulus dividers, shift registers, programmable counters (2 A-, 2 N- and 2 R-counters), phase detectors with charge pump and a control logic block.

Since one of the high speed dual modulus dividers of PMB2302 is able to handle frequencies of up to 1.25 GHz (2.5 GHz), there is no need to add a dedicated external prescaler. The second dual modulus divider handles frequencies up to 500 MHz. The switching signals for the dividing ratios are generated by the corresponding A-counters.

The A-counter and the N-down-counter are programmable via the 3-wire bus. They are clocked by the dual modulus divider output signals. The carry outputs of the N-counters are connected to the frequency inputs of the corresponding phase detectors and are controlling the loading of the programmed A-/N-counter start values.

The two 11 bit R-counters are also programmable of PMB2302 and are serving as reference frequency dividers. Their carry outputs are connected to the corresponding reference frequency inputs of the phase detector and are controlling the loading of the programmed counter start values.

The phase detectors of PMB2302 are of PFD-type (phase and frequency sensitive). They have a linear output characteristic in the 0°phase error region.

The control logic handles phase detectors of PMB2302 output polarity,charge pump output currents and software-generated power-on (all circuit parts except the shift registers and data latches)