PCK2010R

Features: • Mixed 2.5 V and 3.3 V operation• Four CPU clocks at 2.5 V• Eight PCI clocks at 3.3 V, one free-running (synchronous with CPU clocks)• Four 3.3 V fixed clocks @ 66 MHz• Two 2.5 V CPUDIV2 clocks @ 􀀀 CPU clock frequency• Three 2.5 V IOAPIC cloc...

product image

PCK2010R Picture
SeekIC No. : 004456646 Detail

PCK2010R: Features: • Mixed 2.5 V and 3.3 V operation• Four CPU clocks at 2.5 V• Eight PCI clocks at 3.3 V, one free-running (synchronous with CPU clocks)• Four 3.3 V fixed clocks @ 66...

floor Price/Ceiling Price

Part Number:
PCK2010R
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/11/25

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

• Mixed 2.5 V and 3.3 V operation
• Four CPU clocks at 2.5 V
• Eight PCI clocks at 3.3 V, one free-running (synchronous with CPU clocks)
• Four 3.3 V fixed clocks @ 66 MHz
• Two 2.5 V CPUDIV2 clocks @ 􀀀 CPU clock frequency
• Three 2.5 V IOAPIC clocks @ 16.67 MHz
• One 3.3 V 48 MHz USB clock
• Two 3.3 V reference clocks @ 14.318 MHz
• Reference 14.31818 MHz Xtal oscillator input
• 133 MHz or 100 MHz operation
• Power management control input pins
• CPU clock jitter 3 250 ps cycle-cycle
• CPU clock skew 3 175 ps pin-pin
• 0.0ns 1.5 ns CPU - 3V66 delay
• 1.5ns 3.5 ns 3V66 - PCI delay
• 1.5ns 4.0 ns CPU - IOAPIC delay
• 1.5ns 4.0 ns CPU - PCI delay
• Available in 56-pin SSOP package
• ±0.5% center spread spectrum capability via select pins
• 0.5% down spread spectrum capability via select pins



Pinout

  Connection Diagram


Specifications

SYMBOL
PARAMETER
CONDITION
LIMITS
UNIT
MIN
MAX
VDD3 DC 3.3 V core supply voltage  
0.5
+4.6
V
VDDQ3 DC 3.3 V I/O supply voltage  
0.5
+4.6
V
VDDQ2 DC 2.5 V I/O supply voltage  
0.5
+3.6
V
IIK DC input diode current
VI < 0
50
mA
VI DC input voltage
Note 2
0.5
5.5
V
IOK DC output diode current
VO > VCC or VO < 0
±50
mA
VO DC output voltage
Note 2
0.5
VCC + 0.5
V
IO DC output source or sink current
VO = 0 to VCC
±50
mA
TSTG Storage temperature range
65
+150
°C
PTOT Power dissipation per package
plastic medium-shrink (SSOP)
For temperature range: 40 to +125°Cabove +55°C deratelinearlywith11.3mW/K
850
mW

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.




Description

The PCK2010R is a clock generator (frequency synthesizer) chip for a Pentium II and other similar processors.

The PCK2010R has four CPU clock outputs at 2.5 V, two CPUDIV2 clock outputs running at 1/2CPU clock frequency (66 MHz or 50 MHz depending on the state of SEL133/100) and four 3V66 clocks running at 66MHz. There are eight PCI clock outputs running at 33 MHz. One of the PCI clock outputs is free-running. Additionally, the part has three 2.5 V IOAPIC clock outputs at 16.67 MHz and two 3.3 V reference clock outputs at 14.318 MHz. All clock outputs of PCK2010R meet Intel's drive strength, rise/fall time, jitter, accuracy, and skew requirements.

The part possesses dedicated power-down, CPUSTOP, and PCISTOP input pins for power management control. These inputs of PCK2010R are synchronized on-chip and ensure glitch-free output transitions. When the CPUSTOP input is asserted, the CPU clock outputs and 3V66 clock outputs are driven LOW. When the PCISTOP input is asserted, the PCI clock outputs are driven LOW.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Circuit Protection
Static Control, ESD, Clean Room Products
Resistors
Motors, Solenoids, Driver Boards/Modules
Integrated Circuits (ICs)
Line Protection, Backups
View more