Features: • Mixed 2.5V and 3.3V operation• Four CPU clocks at 2.5V• Eight PCI clocks at 3.3V, one free-running(synchronous with CPU clocks)• Four 3.3V fixed clocks @ 66MHz• Two 2.5V CPUDIV2 clocks @ CPU clock frequency• Three 2.5V IOAPIC clocks @ 16.67 MHzR...
PCK2010: Features: • Mixed 2.5V and 3.3V operation• Four CPU clocks at 2.5V• Eight PCI clocks at 3.3V, one free-running(synchronous with CPU clocks)• Four 3.3V fixed clocks @ 66MHz...
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SYMBOL |
PARAMETER |
CONDITION |
LIMITS
|
UNIT
| |
MIN |
MAX | ||||
VDD3 |
DC 3.3 V core supply voltage |
0.5 |
+4.6 |
V | |
VDDQ3 |
DC 3.3 V I/O supply voltage |
0.5 |
+4.6 |
V | |
VDDQ2 |
DC 2.5 V I/O supply voltage |
0.5 |
+3.6 |
V | |
IIK |
DC input diode current |
VI < 0 |
-50 |
mA | |
VI |
DC input voltage |
Note 2 |
0.5 |
+5.5 |
V |
IOK |
DC output diode current |
VO > VCC or VO < 0 |
±50 |
mA | |
VO |
DC output voltage |
Note 2 |
-0.5 |
VCC + 0.5 |
V |
IO |
DC output source or sink current |
VO >= 0 to VCC |
- |
±50 |
mA |
TSTG |
Storage temperature range |
65 |
+150 |
°C | |
Ptot |
Power dissipation per package plastic medium-shrink SO (SSOP) |
For temperature range: 0 to +70°Cabove +55°C derate linearly with 11.3mW/K |
- |
850 |
mW |
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The PCK2010 is a clock synthesizer/driver chip for a PentiumII andother similar processors.
The PCK2010 has four CPU clock outputs at 2.5V, two CPUDIV2clock outputs running at CPU clock frequency (66MHz or 50MHzdepending on the state of SEL133/100) and four 3V66 clocksrunning at 66MHz. There are eight PCI clock outputs running at33MHz. One of the PCI clock outputs is free-running. Additionally,the part has three 2.5V IOAPIC clock outputs at 16.67MHz and two3.3V reference clock outputs at 14.318MHz. All clock outputs meetIntel's drive strength, rise/fall time, jitter, accuracy, and skewrequirements.
The part possesses dedicated power-down, CPUSTOP, andPCISTOP input pins for power management control. These inputs of PCK2010 are synchronized on-chip and ensure glitch-free output transitions.When the CPUSTOP input is asserted, the CPU clock outputs and3V66 clock outputs are driven LOW. When the PCISTOP input isasserted, the PCI clock outputs are driven LOW.
Finally, when the PWRDWN input pin is asserted, the internalreference oscillator and PLLs of PCK2010 are shut down, and all outputs aredriven LOW.