Features: • HIGH speed, LOW noise non-inverting 1:10 buffer• Mobile (reduced pincount) version of PCK2002• Typically used to support two SDRAM DIMMs• 28-pin SSOP and TSSOP packages• See PCK2002 for 48-pin 1-18 buffer part supporting up to 4 SDRAM DIMMs• Optimize...
PCK2002M: Features: • HIGH speed, LOW noise non-inverting 1:10 buffer• Mobile (reduced pincount) version of PCK2002• Typically used to support two SDRAM DIMMs• 28-pin SSOP and TSSOP pa...
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SYMBOL |
PARAMETER |
CONDITION |
LIMITS
|
UNIT
| |
MIN |
MAX | ||||
VDD |
DC 3.3 V supply voltage |
0.5 |
+4.6 |
V | |
IIK |
DC input diode current |
VI < 0 |
-50 |
mA | |
VI |
DC input voltage |
Note 2 |
0.5 |
+4.6 |
V |
IOK |
DC output diode current |
VO > VDD or VO < 0 |
±50 |
mA | |
VO |
DC output voltage |
Note 2 |
-0.5 |
VCC + 0.5 |
V |
IO |
DC output source or sink current |
VO >= 0 to VDD |
- |
±50 |
mA |
TSTG |
Storage temperature range |
65 |
+150 |
°C | |
Ptot |
Power dissipation per package plastic medium-shrink SO (SSOP) |
For temperature range: 0 to +70°Cabove +55°C derate linearly with 11.3mW/K |
- |
850 |
mW |
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The PCK2002M is a 110 fanout buffer used for 133/100 MHz CPU, 66/33 MHz PCI, 14.318 MHz REF, or 133/100/66 MHz SDRAM clock distribution. 10 outputs are typically used to support up to 2 SDRAM DIMMs commonly found in laptop or mobile applications. The PCK2002M has the same features and operating characteristics of the PCK2002 and is available in the SSOP 28 pin package.
All clock outputs of PCK2002M meet Intel's drive, rise/fall time, accuracy, and skew requirements. An I2C interface is included to allow each output to be enabled/disabled individually. An output disabled via the I2C interface will be held in the LOW state. In addition, there is an OE input which 3-states all outputs.