PCF85xxC-2

The PCF85xxC-2 is a family of floating gate Electrically Erasable Programmable Read Only Memories (EEPROMs) with 2, 4 and 8 kbits (256, 512 and 1024 ´ 8-bit). By using an internal redundant storage code PCF85xxC-2 is fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage ofPCF85xxC-2 is generated on-chip, using a voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, a package using eight pins is sufficient. Up to eight PCF85xxC-2 devices may be connected to the I2C-bus. Chip select is accomplished by three address inputs (A0, A1 and A2).

Timing of the E/W cycle of PCF85xxC-2 is carried out internally, thus no external components are required. Pin 7 (PTC) must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an E/W cycle.