MOSFET Dual P-Ch FET Enhancement Mode
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Transistor Polarity : | P-Channel | Drain-Source Breakdown Voltage : | - 60 V | ||
Gate-Source Breakdown Voltage : | +/- 20 V | Continuous Drain Current : | 0.34 A | ||
Resistance Drain-Source RDS (on) : | 1.2 Ohms | Configuration : | Dual | ||
Maximum Operating Temperature : | + 150 C | Mounting Style : | SMD/SMT | ||
Package / Case : | SSOT-6 | Packaging : | Reel |
Symbol |
Parameter |
NDC7003P |
Units | |
VDSS VGSS |
Drain-Source Voltage Gate-Source Voltage - Continuous |
-50 -20 -0.34 -1 0.96 0.9 0.7 -55 to 150 |
V V A W °C | |
ID |
Drain Current Continuous Pulsed | (Note 1a) | ||
PD |
Maximum Power Dissipation | (Note 1a) (Note 1b) (Note 1c) | ||
TJ,TSTG | Operating and Storage Junction Temperature Range |
RJA RJC |
Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case |
(Note 1a) (Note 1) |
130 |
°C/W °C/W |
These dual P-Channel enhancement mode power field effect transistors NDC7003P are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. NDC7003P is particularly suited to low voltage applications requiring a low current high side switch.
Technical/Catalog Information | NDC7003P |
Vendor | Fairchild Semiconductor (VA) |
Category | Discrete Semiconductor Products |
Mounting Type | Surface Mount |
FET Polarity | 2 P-Channel (Dual) |
Drain to Source Voltage (Vdss) | 60V |
Current - Continuous Drain (Id) @ 25° C | 340mA |
Rds On (Max) @ Id, Vgs | 5 Ohm @ 340mA, 10V |
Input Capacitance (Ciss) @ Vds | 66pF @ 25V |
Power - Max | 700mW |
Packaging | Digi-Reel? |
Gate Charge (Qg) @ Vgs | 2.2nC @ 10V |
Package / Case | SuperSOT-6 |
FET Feature | Logic Level Gate |
Drawing Number | * |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | NDC7003P NDC7003P NDC7003PDKR ND NDC7003PDKRND NDC7003PDKR |