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MX10C805X

Features: • High performance CMOS ROM CPU• Operation Voltage 5V• Up to 40MHz operation (3.5MHz to 40MHz)• Three 16-bit timer/counters• 256 Bytes of on-chip data RAM• 4/8/16/32/64 Kbytes on-chip Program memory• 32 Programmable I/O lines• On-chip Watch...

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SeekIC No. : 004431513 Detail

MX10C805X: Features: • High performance CMOS ROM CPU• Operation Voltage 5V• Up to 40MHz operation (3.5MHz to 40MHz)• Three 16-bit timer/counters• 256 Bytes of on-chip data RAMR...

MX10C805X Data Sheet

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Part Number:
MX10C805X
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High performance CMOS ROM CPU
• Operation Voltage 5V
• Up to 40MHz operation (3.5MHz to 40MHz)
• Three 16-bit timer/counters
• 256 Bytes of on-chip data RAM
• 4/8/16/32/64 Kbytes on-chip Program memory
• 32 Programmable I/O lines
• On-chip Watch-Dog-Timer (WDT)
• 6 interrupt Sources
• ROM Code protection
• Two priority levels
• Power saving Idle and power down modes
• 64 K external program memory space
• 64 K external data memory space
• Available in PLCC, PQFP, and PDIP package
• Four 8-bit I/O ports
• Full-duplex enhanced UART compatible with the standard 80C51 and the 80C52
• Extended Temperature Range (-40 to +85)


Pinout

Connection Diagram


Specifications

Ambient Temperature Under Bias -40 to +85
Storage Temperature -65 to +150
Voltage on Any Other Pin to VSS -0.5V to +6.5V
IOL Per I/O Pin 15mA
Power Dissipation 1.5W

(Based on PACKAGE heat transfer limitations, not device consumption)


Description

The single-chip 8-bit microcontroller MX10C805X is manufactured in MXIC's advanced CMOS process. This device uses the same powerful instruction set, has the same architecture, and is pin-to-pin compatible with the existing MX10C805X. The added features make it an even more powerful microcontroller for applications that require clock output, and up/down counting capabilities such as motor control. It also has a more versatile serial channel that facilitates multi-processor communications.




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