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M54/M74HC368

Features: HIGHSPEED tPD= 11 ns(TYP.)ATVCC=5V LOWPOWERDISSIPATION ICC =4 µA(MAX.)AT TA=25°C HIGHNOISEIMMUNITY VNIH=VNIL=28%VCC(MIN.) OUTPUTDRIVECAPABILITY 15LSTTLLOADS SYMMETRICALOUTPUTIMPEDANCE |IOH|=IOL=6 mA(MIN.) BALANCEDPROPAGATIONDELAYS tPLH=tPHL WIDEOPERATINGVOLTAGERANGE VCC (OPR)=2 V ...

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SeekIC No. : 004405692 Detail

M54/M74HC368: Features: HIGHSPEED tPD= 11 ns(TYP.)ATVCC=5V LOWPOWERDISSIPATION ICC =4 µA(MAX.)AT TA=25°C HIGHNOISEIMMUNITY VNIH=VNIL=28%VCC(MIN.) OUTPUTDRIVECAPABILITY 15LSTTLLOADS SYMMETRICALOUTPUTIMPEDAN...

M54/M74HC368 Data Sheet

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Part Number:
M54/M74HC368
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

HIGHSPEED
   tPD= 11 ns(TYP.)ATVCC=5V
LOWPOWERDISSIPATION
  ICC =4 µA(MAX.)AT TA=25°C
HIGHNOISEIMMUNITY
   VNIH=VNIL=28%VCC(MIN.)
OUTPUTDRIVECAPABILITY
   15LSTTLLOADS
SYMMETRICALOUTPUTIMPEDANCE
   |IOH|=IOL=6 mA(MIN.)
BALANCEDPROPAGATIONDELAYS
   tPLH=tPHL
WIDEOPERATINGVOLTAGERANGE
   VCC (OPR)=2 V TO 6 V
PINANDFUNCTIONCOMPATIBLEWITH
   54/74LS367/368


Pinout

Connection Diagram


Specifications

Symbol Parameter Value Unit  
VCC SupplyVoltage -0.5to+7 V  
VI
 DCInputVoltage -0.5to VCC+0.5 V  
VO
 DCOutputVoltage -0.5to VCC+0.5 V  
IIK
 DCInputDiodeCurrent ±20 mA  
IOK
 DCOutputDiodeCurrent ±20 mA  
IO
 DCOutputSourceSinkCurrentPerOutputPin ±35 mA  
ICCorIGND
 DC VCC orGroundCurrent ±70 mA  
PD
 PowerDissipation 500(*) mW  
Tstg
 StorageTemperature -65to+150 °C  
TL
 LeadTemperature(10sec) 300 °C  



Description

The M54/74HC367 and the M54/74HC368 are high speed CMOSHE XBUSBUFFER (3-STATE) fabri-catedinsilicongateC2
MOS technology.Theyhave the same high speed performance of LSTTL combined with true CMOS low power consumption.

The sedevice scontain sixbuffers,fourbuffers of  M54/74HC367 and the M54/74HC368  are controlled by an enablein put (G1) and the other two buffers are controlled by the other enableinput (G2);the output sofe ach buffer group areen abled when G1 and/or G2 in put sareheld low,and when held high the seout put sare disabled to be high-impedance. These out put sare capable of driving up to 15LSTTL  loads.The designer has achoice of non inverting out puts (HC367) and inverting out puts (HC368). All inputs are equipped with protection circuits against staticdis chargeand transien tex cess  volt-age.




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